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| author | Jaiprakash Singh <jaiprakashs@marvell.com> | 2025-12-11 23:17:24 -0800 |
|---|---|---|
| committer | Jaiprakash Singh <jaiprakashs@marvell.com> | 2026-01-12 16:29:45 +0000 |
| commit | 1df0bb505644bb00d2e700e4baeea2c1ab730de4 (patch) | |
| tree | 7638aeabc4770bbde4538477ccc2366910b53cdb | |
| parent | 90fe41595838a36e1d062f96d1f9bd25bb55a539 (diff) | |
| download | arm-trusted-firmware-1df0bb505644bb00d2e700e4baeea2c1ab730de4.tar.gz arm-trusted-firmware-1df0bb505644bb00d2e700e4baeea2c1ab730de4.zip | |
fix(cpus): enable Neoverse-V2 external LLC support
Change-Id: I9582c7405db6862e77db240822e241d4082966f2
Signed-off-by: Jaiprakash Singh <jaiprakashs@marvell.com>
| -rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 4 | ||||
| -rw-r--r-- | lib/cpus/cpu-ops.mk | 1 |
2 files changed, 5 insertions, 0 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 334f3f60e..8205fd42d 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -1518,6 +1518,10 @@ architecture that can be enabled by the platform as desired. This is used to control how the LL_CACHE* PMU events count. Default value is 0 (Disabled). +- ``NEOVERSE_Vx_EXTERNAL_LLC``: This flag has the same behaviour as + ``NEOVERSE_Nx_EXTERNAL_LLC`` but for Neoverse-V2. This is disabled + by default. Default value is 0 (Disabled). + - ``NEOVERSE_N2_PREFETCHER_DISABLE``: This flag disables the region prefetcher on the Neoverse N2 core. This is used during performance analysis to get clean and repeatable measurements of the cache by preventing speculative data fetches diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 095dfd496..8cbfa35eb 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -45,6 +45,7 @@ CPU_FLAG_LIST += WORKAROUND_CVE_2024_5660 # Flags to indicate internal or external Last level cache # By default internal CPU_FLAG_LIST += NEOVERSE_Nx_EXTERNAL_LLC +CPU_FLAG_LIST += NEOVERSE_Vx_EXTERNAL_LLC # Flag to enable or disable hardware prefetcher for Neoverse N2 CPU # By default enabled |