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| author | Xialin Liu <xialin.liu@arm.com> | 2025-12-31 10:11:43 -0600 |
|---|---|---|
| committer | Xialin Liu <xialin.liu@arm.com> | 2026-01-06 11:38:51 -0600 |
| commit | 35f001256250782a9ef6af0c7218053bd485995a (patch) | |
| tree | 7f65330b3da40583e9a22938f0c623139d605e29 | |
| parent | 5e168c47f0a81062d929633ae4e243cdb2fcfd22 (diff) | |
| download | arm-trusted-firmware-35f001256250782a9ef6af0c7218053bd485995a.tar.gz arm-trusted-firmware-35f001256250782a9ef6af0c7218053bd485995a.zip | |
fix(cpus): workaround for Neoverse-N2 erratum 3888123
Neoverse-N2 erratum 3888123 that applies to r0p0, r0p1,
r0p2 and r0p3, and is still open.
The erratum can be avoided by setting CPUACTLR2[22] to 1'b1,
which will disable linking multiple Non-Cacheable or Device
GRE loads to the same read request for the cache-line. This
might have a significant performance impact to Non-cacheable
and Device GRE read bandwidth for streaming scenarios.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1982442/latest
Change-Id: I6240d263fb5d153721b5b84a37df2f24e3d02d86
Signed-off-by: Xialin Liu <xialin.liu@arm.com>
| -rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 6 | ||||
| -rw-r--r-- | lib/cpus/aarch64/neoverse_n2.S | 8 | ||||
| -rw-r--r-- | lib/cpus/cpu-ops.mk | 6 |
3 files changed, 17 insertions, 3 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 944b5c201..da2b596d1 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -785,6 +785,10 @@ For Neoverse N2, the following errata build flags are defined : CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is still open. +- ``ERRATA_N2_3888123``: This applies errata 3888123 workaround to Neoverse-N2 + CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is + still open. + For Neoverse N3, the following errata build flags are defined : - ``ERRATA_N3_3456111``: This applies errata 3456111 workaround to Neoverse-N3 @@ -1419,7 +1423,7 @@ GIC Errata Workarounds -------------- -*Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved.* +*Copyright (c) 2014-2026, Arm Limited and Contributors. All rights reserved.* .. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715 .. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639 diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index df088c426..a69223e19 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2025, Arm Limited. All rights reserved. + * Copyright (c) 2020-2026, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -229,6 +229,12 @@ add_erratum_entry neoverse_n2, ERRATUM(3701773), ERRATA_N2_3701773 check_erratum_ls neoverse_n2, ERRATUM(3701773), CPU_REV(0, 3) +workaround_reset_start neoverse_n2, ERRATUM(3888123), ERRATA_N2_3888123 + sysreg_bit_set NEOVERSE_N2_CPUACTLR2_EL1, BIT(22) +workaround_reset_end neoverse_n2, ERRATUM(3888123) + +check_erratum_ls neoverse_n2, ERRATUM(3888123), CPU_REV(0, 3) + workaround_reset_start neoverse_n2, CVE(2022,23960), WORKAROUND_CVE_2022_23960 #if IMAGE_BL31 /* diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index d3c1acee6..e241c0d5b 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved. +# Copyright (c) 2014-2026, Arm Limited and Contributors. All rights reserved. # Copyright (c) 2020-2022, NVIDIA Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause @@ -786,6 +786,10 @@ CPU_FLAG_LIST += ERRATA_N2_3324339 # of the Neoverse N2 cpu and is still open. CPU_FLAG_LIST += ERRATA_N2_3701773 +# Flag to apply erratum 3888123 workaround during reset. This erratum applies +# to r0p0, r0p1, r0p2 and r0p3 of the Neoverse N2 cpu and is still open. +CPU_FLAG_LIST += ERRATA_N2_3888123 + # Flag to apply erratum 3456111 workaround during reset. This erratum applies # to revisions r0p0 and r0p1 of the Neoverse N3 cpu and is still open. CPU_FLAG_LIST += ERRATA_N3_3456111 |