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| author | Serge Semin <fancer.lancer@gmail.com> | 2026-08-03 14:19:51 +0300 |
|---|---|---|
| committer | Serge Semin <fancer.lancer@gmail.com> | 2026-08-13 15:02:07 +0300 |
| commit | 287f7ed64f1812a0623a5cad6572be01fdb441ca (patch) | |
| tree | 79319791e72c93b368a26fb8e441446b1466919f | |
| parent | 494ea6402a6509dced83d4a22d44acdc1e3d26f4 (diff) | |
| download | linux-287f7ed64f1812a0623a5cad6572be01fdb441ca.tar.gz linux-287f7ed64f1812a0623a5cad6572be01fdb441ca.zip | |
clk: baikal-t1: Add direct AXI DDR reset supportclk/bt1
Currently only the self-cleared AXI DDR reset is supported by the driver
and exposed in the DT-bindings. In some circumstances of the
DDR-controller initialization procedure though it gets to be not enough to
make the memory controller working. Let's add the flag directly handling
the AXI DDR signal, which is a fixup provided by the HW designers just in
case the self-cleared version won't work correctly. The resultant signal
is (!RST_T & !RST_D).
Note it's just a decorative change since the DDR controller is initialized
on the bootloader stage anyway. It's also ok to fix the reset IDs like
that since there is no user of the bindings in upstream anyway. Any new
user shall compile in the correct IDs in the DTBs in time.
Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
| -rw-r--r-- | drivers/clk/bt1/ccu-rst.c | 5 | ||||
| -rw-r--r-- | include/dt-bindings/reset/bt1-ccu.h | 21 |
2 files changed, 14 insertions, 12 deletions
diff --git a/drivers/clk/bt1/ccu-rst.c b/drivers/clk/bt1/ccu-rst.c index 969e5de381a8..269994a3d5e1 100644 --- a/drivers/clk/bt1/ccu-rst.c +++ b/drivers/clk/bt1/ccu-rst.c @@ -64,11 +64,12 @@ struct ccu_rst_info { /* * Each AXI-bus clock divider is equipped with the corresponding clock-consumer - * domain reset (it's self-deasserted reset control). + * domain reset (it's mostly self-deasserted reset control). */ static const struct ccu_rst_info axi_rst_info[] = { [CCU_AXI_MAIN_RST] = CCU_RST_TRIG(CCU_AXI_MAIN_BASE, 1), - [CCU_AXI_DDR_RST] = CCU_RST_TRIG(CCU_AXI_DDR_BASE, 1), + [CCU_AXI_DDR_T_RST] = CCU_RST_TRIG(CCU_AXI_DDR_BASE, 1), + [CCU_AXI_DDR_D_RST] = CCU_RST_DIR(CCU_AXI_DDR_BASE, 8), [CCU_AXI_SATA_RST] = CCU_RST_TRIG(CCU_AXI_SATA_BASE, 1), [CCU_AXI_GMAC0_RST] = CCU_RST_TRIG(CCU_AXI_GMAC0_BASE, 1), [CCU_AXI_GMAC1_RST] = CCU_RST_TRIG(CCU_AXI_GMAC1_BASE, 1), diff --git a/include/dt-bindings/reset/bt1-ccu.h b/include/dt-bindings/reset/bt1-ccu.h index c691efaa678f..1259bd08bd0e 100644 --- a/include/dt-bindings/reset/bt1-ccu.h +++ b/include/dt-bindings/reset/bt1-ccu.h @@ -8,16 +8,17 @@ #define __DT_BINDINGS_RESET_BT1_CCU_H #define CCU_AXI_MAIN_RST 0 -#define CCU_AXI_DDR_RST 1 -#define CCU_AXI_SATA_RST 2 -#define CCU_AXI_GMAC0_RST 3 -#define CCU_AXI_GMAC1_RST 4 -#define CCU_AXI_XGMAC_RST 5 -#define CCU_AXI_PCIE_M_RST 6 -#define CCU_AXI_PCIE_S_RST 7 -#define CCU_AXI_USB_RST 8 -#define CCU_AXI_HWA_RST 9 -#define CCU_AXI_SRAM_RST 10 +#define CCU_AXI_DDR_T_RST 1 +#define CCU_AXI_DDR_D_RST 2 +#define CCU_AXI_SATA_RST 3 +#define CCU_AXI_GMAC0_RST 4 +#define CCU_AXI_GMAC1_RST 5 +#define CCU_AXI_XGMAC_RST 6 +#define CCU_AXI_PCIE_M_RST 7 +#define CCU_AXI_PCIE_S_RST 8 +#define CCU_AXI_USB_RST 9 +#define CCU_AXI_HWA_RST 10 +#define CCU_AXI_SRAM_RST 11 #define CCU_SYS_SATA_REF_RST 0 #define CCU_SYS_APB_RST 1 |