kernel/git/next/linux-next.git/drivers/soc/fsl, branch master

Merge branch 'master' of https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git

2026-09-14T14:21:53+00:00

soc: fsl: qe: drop GPIOD_FLAGS_BIT_NONEXCLUSIVE

2026-09-10T14:04:40+00:00

The GPIOD_FLAGS_BIT_NONEXCLUSIVE flag for gpiod_get() is deprecated. For actually shared GPIOs, it should be replaced by using the functionality provided by gpio-shared-proxy. The Freescale QUICC Engine GPIO driver uses it as a workaround to access the GPIO descriptor already requested by the caller of qe_pin_request() in order to access the private GPIO chip data. As the existing comment itself states, the user already requested this GPIO and the only user in tree is the FHCI USB driver which does in fact request it, we can safely modify the function to take the *exclusive* GPIO descriptor as argument and stop using the deprecated flag. Signed-off-by: Bartosz Golaszewski Acked-by: Greg Kroah-Hartman Link: https://lore.kernel.org/r/20260908-usb-fhci-drop-gpio-nonexclusive-v1-1-8e405dc67874@oss.qualcomm.com Signed-off-by: Christophe Leroy (CS GROUP)

soc/fsl/qe: qe_ports_ic: Drop redundant IRQ_DOMAIN_FLAG_DESTROY_GC

2026-09-07T19:49:58+00:00

Now that __irq_domain_instantiate() automatically sets IRQ_DOMAIN_FLAG_DESTROY_GC when dgc_info is provided, the explicit flag in the irq_domain_info is redundant. Remove it. Signed-off-by: Qingshuang Fu Signed-off-by: Thomas Gleixner Reviewed-by: Herve Codina Link: https://patch.msgid.link/20260907024046.28845-4-fuqingshuang@kylinos.cn

soc: fsl: qe: Fix sparse warnings in GPIO

2026-09-07T18:16:35+00:00

A C=2 build on mpc83xx_defconfig provides following warnings: drivers/soc/fsl/qe/gpio.c:44:34: warning: incorrect type in assignment (different base types) drivers/soc/fsl/qe/gpio.c:44:34: expected restricted __be32 [usertype] cpdata drivers/soc/fsl/qe/gpio.c:44:34: got unsigned int [usertype] cpdata drivers/soc/fsl/qe/gpio.c:45:34: warning: incorrect type in assignment (different base types) drivers/soc/fsl/qe/gpio.c:45:34: expected restricted __be32 [usertype] cpdir1 drivers/soc/fsl/qe/gpio.c:45:34: got unsigned int drivers/soc/fsl/qe/gpio.c:46:34: warning: incorrect type in assignment (different base types) drivers/soc/fsl/qe/gpio.c:46:34: expected restricted __be32 [usertype] cpdir2 drivers/soc/fsl/qe/gpio.c:46:34: got unsigned int drivers/soc/fsl/qe/gpio.c:47:34: warning: incorrect type in assignment (different base types) drivers/soc/fsl/qe/gpio.c:47:34: expected restricted __be32 [usertype] cppar1 drivers/soc/fsl/qe/gpio.c:47:34: got unsigned int drivers/soc/fsl/qe/gpio.c:48:34: warning: incorrect type in assignment (different base types) drivers/soc/fsl/qe/gpio.c:48:34: expected restricted __be32 [usertype] cppar2 drivers/soc/fsl/qe/gpio.c:48:34: got unsigned int drivers/soc/fsl/qe/gpio.c:49:33: warning: incorrect type in assignment (different base types) drivers/soc/fsl/qe/gpio.c:49:33: expected restricted __be32 [usertype] cpodr drivers/soc/fsl/qe/gpio.c:49:33: got unsigned int drivers/soc/fsl/qe/gpio.c:297:17: warning: restricted __be32 degrades to integer drivers/soc/fsl/qe/gpio.c:299:17: warning: restricted __be32 degrades to integer drivers/soc/fsl/qe/gpio.c:302:17: warning: restricted __be32 degrades to integer drivers/soc/fsl/qe/gpio.c:304:17: warning: restricted __be32 degrades to integer drivers/soc/fsl/qe/gpio.c:308:18: warning: restricted __be32 degrades to integer drivers/soc/fsl/qe/gpio.c:314:9: warning: restricted __be32 degrades to integer The problem is the 'struct qe_pio_reg' embedded in 'struct qe_gpio_chip' to save register values. As the values are read with ioread32be(), they are now in CPU byte order and can't be stored as-is in a __be32 object. Replace 'struct qe_pio_reg saved_regs' by individual u32 fields. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202608051952.ADkLIB86-lkp@intel.com/ Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202608130908.gEy44F1D-lkp@intel.com/ Link: https://lore.kernel.org/r/6a84b38e766729676b375c93bf54c67ea455288d.1786080840.git.chleroy@kernel.org Signed-off-by: Christophe Leroy (CS GROUP)

Merge tag 'soc_fsl-7.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux into soc/drivers

2026-08-10T08:15:56+00:00

FSL SOC Changes for 7.3 Freescale QUICC Engine: - Use generic I/O helpers in interrupt controller for IO Ports - Move CONFIG_QE_GPIO out of powerpc - Fix DT scan for GPIO nodes - Convert IO ports interrupt controller to generic IRQ chip - Add support of IRQs in GPIO controller - Implement get_direction() in GPIO controller - Check platform_driver_register() in interrupt controller for IO Ports Data Path I/O: - Replace maintainer - Remove redundant dev_err() - Fix kernel-doc typos Freescale Management Complex: - Use strscpy() to copy strings into arrays - Remove redundant dev_err() - Drop unused assignment of acpi_device_id::driver_data Other changes: - Add kernel and device tree binding support for RCW override, completing the SerDes PHY driver functionality - Fix kernel-doc warnings and typos in DPAA header * tag 'soc_fsl-7.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux: (31 commits) bus: fsl-mc: drop unused assignment of acpi_device_id::driver_data soc: fsl: qe: check platform_driver_register() in qe_ic_of_init() phy: lynx-10g: use RCW override procedure for dynamic protocol change soc: fsl: guts: implement the RCW override procedure dt-bindings: fsl: layerscape-dcfg: define DCFG_DCSR region soc: fsl: guts: make fsl_soc_data available after fsl_guts_init() soc: fsl: guts: make it easier to determine on which SoC we are running soc: fsl: guts: add a central fsl_guts_read() function soc: fsl: guts: add a global structure to hold state soc: fsl: guts: use a macro to encode the DCFG CCSR space soc: fsl: guts: perform fsl_guts_init() error teardown in reverse order of setup soc: fsl: dpio: fix kernel-doc typos soc: fsl: fix kernel-doc warnings and typos bus: fsl-mc: Remove redundant dev_err() soc: fsl: qe: Add support of IRQs in QE GPIO soc: fsl: qe: Rename irq variable to parent_irq soc: fsl: qe: Convert to generic IRQ chip soc: fsl: qe: Handle spurious interrupts soc: fsl: qe: Iterate over all pending interrupts in cascade handler soc: fsl: qe: Use generic_handle_domain_irq() ... Signed-off-by: Arnd Bergmann

soc: fsl: qe: check platform_driver_register() in qe_ic_of_init()

2026-08-07T04:54:23+00:00

qe_ic_of_init() ignored the return value of platform_driver_register() and always returned success. Propagate the error to the initcall. Fixes: be7ecbd240b2 ("soc: fsl: qe: convert QE interrupt controller to platform_device") Signed-off-by: Linkai Gong Reviewed-by: Maxim Kochetkov Link: https://lore.kernel.org/r/20260731094608.1883391-1-gonglinkai@kylinos.cn Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: guts: implement the RCW override procedure

2026-08-07T04:54:23+00:00

Add support for the RCW override procedure which enables runtime reconfiguration of the protocol running on a SerDes lane. The procedure is done through the DCFG DCSR space which now can be defined as the second memory region of the guts DT node. Support is added on the following SoCs: LS1046A, LS1088A, LS2088A. The procedure is exported to the "client" driver - the Lynx10G SerDes PHY driver - through the following functions: - fsl_guts_lane_validate() used to validate that changing the protocol on a specific lane is supported. - fsl_guts_lane_set_mode() which can be used to request the RCW procedure be executed for a specific lane. Since the RCW override procedure is different depending on the SoC, the private fsl_soc_data structure is updated with two new per SoC callbacks (.serdes_get_rcw_override() and .serdes_init_rcwcr()) which get used from the generic fsl_guts_lane_set_mode() function. These two callbacks hide all the SoC specific register offsets, masks and values so that the _set_mode() procedure is straightforward. Signed-off-by: Ioana Ciornei Signed-off-by: Vladimir Oltean Reviewed-by: Ioana Ciornei Link: https://lore.kernel.org/r/20260721231603.67865-9-vladimir.oltean@nxp.com Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: guts: make fsl_soc_data available after fsl_guts_init()

2026-08-07T04:54:23+00:00

In a future change, struct fsl_soc_data will be extended with methods for performing RCW override. Since this will be performed from a calling context outside fsl_guts_init(), we need to keep track of the soc_data that we determine at fsl_guts_init() time, so we can reference it later. Signed-off-by: Vladimir Oltean Reviewed-by: Ioana Ciornei Link: https://lore.kernel.org/r/20260721231603.67865-7-vladimir.oltean@nxp.com Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: guts: make it easier to determine on which SoC we are running

2026-08-07T04:54:23+00:00

The guts driver will need to easily determine on which SoC it's running when it will need to perform RCW override at runtime. The guts driver knows this already because fsl_guts_init() reads the QorIQ/Layerscape architectural System Version Register (SVR), but it doesn't save this for later lookups. Add a new qoriq_die enum to be used as an index in the fsl_soc_die array. A new fsl_soc_die_match_one() function is also added so that we can directly determine if the SVR is a match with a specific die. The SVR value read from the DCFG CCSR is also kept in the global soc structure so that it can be accessed when needed. Signed-off-by: Ioana Ciornei Signed-off-by: Vladimir Oltean Link: https://lore.kernel.org/r/20260721231603.67865-6-vladimir.oltean@nxp.com Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: guts: add a central fsl_guts_read() function

2026-08-07T04:54:23+00:00

Add a central fsl_guts_read() function which will take into account the endianness that was already determined. No point is duplicating the if-else statement each time we need to read a DCFG register. Signed-off-by: Ioana Ciornei Signed-off-by: Vladimir Oltean Link: https://lore.kernel.org/r/20260721231603.67865-5-vladimir.oltean@nxp.com Signed-off-by: Christophe Leroy (CS GROUP)