<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/next/linux-next.git/include/uapi/drm, branch master</title>
<subtitle>The linux-next integration testing tree</subtitle>
<id>https://git.landau.one/pub/scm/linux/kernel/git/next/linux-next.git/atom?h=master</id>
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<updated>2026-09-07T13:27:01+00:00</updated>
<entry>
<title>Merge branch 'drm-xe-next' of https://gitlab.freedesktop.org/drm/xe/kernel.git</title>
<updated>2026-09-07T13:27:01+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2026-09-07T13:27:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=fea3640f8fc0ddea196871c4822f90a0687a7431'/>
<id>urn:sha1:fea3640f8fc0ddea196871c4822f90a0687a7431</id>
<content type='text'>
</content>
</entry>
<entry>
<title>drm/xe/uapi: Expose ban reason in EXEC_QUEUE_GET_PROPERTY_BAN</title>
<updated>2026-09-04T05:30:13+00:00</updated>
<author>
<name>Tejas Upadhyay</name>
<email>tejas.upadhyay@intel.com</email>
</author>
<published>2026-09-03T16:16:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=69183b7062061ce9985a6e116890ffb7929bd1f4'/>
<id>urn:sha1:69183b7062061ce9985a6e116890ffb7929bd1f4</id>
<content type='text'>
Extend DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN to return a bitmask indicating
the reason for the ban, rather than a simple boolean. This allows
userspace to distinguish between different ban causes:

- DRM_XE_EXEC_QUEUE_BAN_REASON_GPU_HANG (bit 0): exec queue was banned
  due to a GPU hang or job timeout detected by the TDR.
- DRM_XE_EXEC_QUEUE_BAN_REASON_PAGE_OFFLINE (bit 1): exec queue was
  banned because a VRAM page backing its resources was taken offline.

The ban_reason field is added to struct xe_exec_queue and set at the
point where the ban is triggered:
- In guc_exec_queue_timedout_job() for GPU hang.
- In xe_ttm_vram_purge_page() for memory page offline, before calling
  xe_exec_queue_kill() or xe_vm_kill().

The reset_status op is updated to return u64 with the reason bitmask.
When a queue is banned but no explicit reason was recorded (e.g., from a
generic CAT error), it defaults to GPU_HANG for backward compatibility.
A value of 0 means the exec queue is not banned.

v5 (Sashiko/MattB):
- Take the write lock for the traversal to tag ban_reason
v4(Sashiko):
- Add ban reason for non-LR exec queues
- Add TODO for multiqueue
v3(Rodrigo):
- Add doc in xe_drm.h
v2(Sashiko):
- Use atomic_t for ban_reason to fix concurrent updates from TDR and
  page-offline
- Guard GPU_HANG bit with !exec_queue_killed to avoid masking
  page-offline reason
- Clear ban_reason on queue recovery (clear_exec_queue_banned path)
- Use atomic_read in guc_exec_queue_reset_status for lockless read

Assisted-by: Copilot:claude-opus-4.6
Acked-by: José Roberto de Souza &lt;jose.souza@intel.com&gt;
Acked-by: Michal Mrozek &lt;michal.mrozek@intel.com&gt;
Reviewed-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Reviewed-by: Himal Prasad Ghimiray &lt;himal.prasad.ghimiray@intel.com&gt;
Signed-off-by: Tejas Upadhyay &lt;tejas.upadhyay@intel.com&gt;
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Link: https://patch.msgid.link/20260903161553.528932-31-tejas.upadhyay@intel.com
</content>
</entry>
<entry>
<title>drm/xe/vm: Add srcid to xe_vm_get_property_ioctl fault report</title>
<updated>2026-09-03T20:38:44+00:00</updated>
<author>
<name>Jonathan Cavitt</name>
<email>jonathan.cavitt@intel.com</email>
</author>
<published>2026-09-02T21:43:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=88064894bcce6d239804e54bd7f577645d4739ab'/>
<id>urn:sha1:88064894bcce6d239804e54bd7f577645d4739ab</id>
<content type='text'>
Add the SRCID of the faulting hardware unit to the return of the
xe_vm_get_property_ioctl fault report.

v2:
- Readd pad check, as the pad in the ioctl struct was not changed
  (jcavitt)

v3:
- Squash SRCID with ASID to keep the struct compact (Matthew)

Signed-off-by: Jonathan Cavitt &lt;jonathan.cavitt@intel.com&gt;
Reviewed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Cc: Matthew Brost &lt;matthew.brost@intel.com&gt;
Cc: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Cc: David Airlie &lt;airlied@gmail.com&gt;
Cc: Simona Vetter &lt;simona@ffwll.ch&gt;
Cc: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
Cc: Maxime Ripard &lt;mripard@kernel.org&gt;
Cc: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Link: https://patch.msgid.link/20260902214358.348399-3-jonathan.cavitt@intel.com
</content>
</entry>
<entry>
<title>drm/amdgpu: Add ioctl infra for exporting/importing UALink handles</title>
<updated>2026-09-02T19:31:37+00:00</updated>
<author>
<name>Mukul Joshi</name>
<email>mukul.joshi@amd.com</email>
</author>
<published>2026-08-20T14:40:53+00:00</published>
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<id>urn:sha1:15d1c306d8291a9d66f900b10c31e87591169ecd</id>
<content type='text'>
Add the ioctl infrastructure to support exporting and importing BOs
to facilitate NPA based memory sharing across GPUs in a rack scale
setup.

Proposed userspace:
https://github.com/ROCm/rocm-systems/blob/35959f8e1260c7cee3e51a740e320be3856ee4ff/projects/rocr-runtime/libhsakmt/src/memory.c#L971
https://github.com/ROCm/rocm-systems/blob/35959f8e1260c7cee3e51a740e320be3856ee4ff/projects/rocr-runtime/libhsakmt/src/memory.c#L1036

v2: Move the ioctl wire-up to the end of the series.

Signed-off-by: Mukul Joshi &lt;mukul.joshi@amd.com&gt;
Signed-off-by: Horatio Zhang &lt;hongkun.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add a new NPA Address space</title>
<updated>2026-09-02T19:24:01+00:00</updated>
<author>
<name>Mukul Joshi</name>
<email>mukul.joshi@amd.com</email>
</author>
<published>2026-04-27T23:09:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=09152b002ffde5bc769656aaa42728a2046c8bb5'/>
<id>urn:sha1:09152b002ffde5bc769656aaa42728a2046c8bb5</id>
<content type='text'>
Add a new address space for NPA address management.
This is needed for sharing buffer objects across GPUs
with each running their own OS. The NPA address space
size can change across different HW generations so the
size is initialized during early init of the driver boot
up process.

Signed-off-by: Mukul Joshi &lt;mukul.joshi@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/userq: fix struct drm_amdgpu_info_device padding for 32bit compile</title>
<updated>2026-09-02T19:17:03+00:00</updated>
<author>
<name>Yogesh Mohan Marimuthu</name>
<email>yogesh.mohanmarimuthu@amd.com</email>
</author>
<published>2026-08-20T04:22:50+00:00</published>
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<id>urn:sha1:497b5090f2857ef8ad9a162aa31ada0de5814663</id>
<content type='text'>
need to pad before __u64 tcc_disabled_mask variable.

This patch fixes 64bit Kernel + 32 bit mesa combination. But at the same
time it will break 32bit Kernel(using this patch) + older 32bit mesa(not
using this patch).

This issue was discussd with alexander.deucher@amd.com,
christian.koenig@amd.com and pierre-eric.pelloux-prayer@amd.com.
Currently today 32 bit kernel + 32 bit userspace and 64 bit kernel and
64 bit userspace work.  Mixed 64 bit kernel and 32 bit userspace is
currently broken.  Since 32 bit kernel and userspace is probably pretty
rare these days and the data affected by this is not critical, Hence
we can go ahead with this patch.

Fixes: cf21e76a6005 ("drm/amdgpu: return tcc_disabled_mask to userspace")
Signed-off-by: Yogesh Mohan Marimuthu &lt;yogesh.mohanmarimuthu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge drm/drm-next into drm-xe-next</title>
<updated>2026-08-31T22:42:28+00:00</updated>
<author>
<name>Matthew Brost</name>
<email>matthew.brost@intel.com</email>
</author>
<published>2026-08-31T22:34:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=cc467969646b9778c947bec1383fb3cdaada14d5'/>
<id>urn:sha1:cc467969646b9778c947bec1383fb3cdaada14d5</id>
<content type='text'>
Prep drm-xe-next for 7.4 PR.

Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/ras: Introduce error threshold</title>
<updated>2026-08-28T16:35:23+00:00</updated>
<author>
<name>Raag Jadav</name>
<email>raag.jadav@intel.com</email>
</author>
<published>2026-08-18T13:52:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=b2207d4c4e84347a3a6b26b77e218cfc606d0109'/>
<id>urn:sha1:b2207d4c4e84347a3a6b26b77e218cfc606d0109</id>
<content type='text'>
Add get-error-threshold and set-error-threshold command support which
allows querying/setting error threshold of the counter. Threshold in RAS
context means the number of errors the hardware is expected to accumulate
before it raises them to software. This is to have a fine grained control
over error notifications that are raised by the hardware.

Signed-off-by: Raag Jadav &lt;raag.jadav@intel.com&gt;
Reviewed-by: Riana Tauro &lt;riana.tauro@intel.com&gt;
Acked-by: Joshua Santhosh Ranjan &lt;joshua.santosh.ranjan@intel.com&gt;
Link: https://patch.msgid.link/20260818135304.497098-3-raag.jadav@intel.com
Acked-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/userq: Add syncobj_points to signal ioctl</title>
<updated>2026-08-25T22:25:25+00:00</updated>
<author>
<name>David Rosca</name>
<email>david.rosca@amd.com</email>
</author>
<published>2025-09-13T14:47:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=a04891c9dc4c7e88dc829da8d754363e211bf0b9'/>
<id>urn:sha1:a04891c9dc4c7e88dc829da8d754363e211bf0b9</id>
<content type='text'>
Userspace patches:

* radeonsi NV_timeline_semaphore
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37335

* RADV user queues
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40808

Signed-off-by: David Rosca &lt;david.rosca@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drm-msm-next-2026-08-01' of https://gitlab.freedesktop.org/drm/msm into drm-next</title>
<updated>2026-08-24T01:21:12+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2026-08-24T01:21:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=e91d58cb2f470fe15bd4e02a26d44e9aaf771346'/>
<id>urn:sha1:e91d58cb2f470fe15bd4e02a26d44e9aaf771346</id>
<content type='text'>
Changes for v7.3

Bindings:
- Added Shikra support
- Document a840, a704, a722

Core:
- Use drm_client buffers for fbdev emulation
- teardown fixes
- ARM32 DMA fixup
- Remove objects from evict list when re-validated
- Bunch of corner case and error path fixes

DPU:
- Dropped dev_pm_opp_set_rate(0) preventing burnout
- Fixed SSPP offsets of Kaanapali

DP:
- Dropped dev_pm_opp_set_rate(0) preventing burnout
- Cleaned up core code in preparation for MST support
- Fixed prepare() to let Pipewire continue in case of the unplugged cable

GPU:
- Add support for a704
- Add support for a722

HDMI:
- Simplifed register access

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
From: Rob Clark &lt;rob.clark@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/CACSVV02Kp=J+w_RjEJbBbQnBYRb+SWdwMvVbCaAL70bq9EBagQ@mail.gmail.com
</content>
</entry>
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