<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/stable/linux.git/drivers/iommu/amd, branch master</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master</id>
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<updated>2026-09-11T15:27:22+00:00</updated>
<entry>
<title>iommu/amd: Remove unused macro</title>
<updated>2026-09-11T15:27:22+00:00</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-09-11T08:33:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=b63c3c26726576e2a87baeee80bc202a5a43c9e5'/>
<id>urn:sha1:b63c3c26726576e2a87baeee80bc202a5a43c9e5</id>
<content type='text'>
Remove unsed device range capability related macros.

No functional changes.

Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Remove redundant checks from interrupt handler path</title>
<updated>2026-09-11T15:27:22+00:00</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-09-11T08:33:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=80a4e3ad8daba66915a9bdf0fcae5831cc8dbd5f'/>
<id>urn:sha1:80a4e3ad8daba66915a9bdf0fcae5831cc8dbd5f</id>
<content type='text'>
PPR and GAlog interrupt is enabled only if buffer is allocated.
(See amd_iommu_enable_ppr_log() and iommu_ga_log_enable()).

The duplicate check in interrupt hanlder path is unnecessary
and can be removed.

No functional changes.

Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Remove redundant check in irq_remapping_select()</title>
<updated>2026-09-11T15:27:21+00:00</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-09-11T08:33:51+00:00</published>
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<id>urn:sha1:5e1afd4ea1d6a9bbaecf3e28707dac9c8b56bd45</id>
<content type='text'>
The amd_iommu_irq_remap flag is already validated during irq remapping
domain creation (before calling amd_iommu_create_irq_domain()). The
duplicate check in irq_remapping_select() is unnecessary and can be
removed.

Additionally, mark amd_iommu_irq_remap as static.

No functional changes.

Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Make iommu_sva_set_dev_pasid as static</title>
<updated>2026-09-11T15:27:21+00:00</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-09-11T08:33:50+00:00</published>
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<id>urn:sha1:798514a25544d6978d0bd7fe7071c9bdb5503076</id>
<content type='text'>
Its used inside pasid.c only.

No functional changes.

Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Fix ineffective error check in nested domain allocation</title>
<updated>2026-09-07T13:03:01+00:00</updated>
<author>
<name>Hemanth Selam</name>
<email>hemanth.selam@gmail.com</email>
</author>
<published>2026-08-25T10:05:54+00:00</published>
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<id>urn:sha1:fa5c0827f0b7bac6d0a188f10118151769ae68fd</id>
<content type='text'>
amd_iommu_pdom_id_alloc() returns an int: a domain ID on success, or the
negative errno from ida_alloc_range() when the ID space is exhausted or
memory is short.  amd_iommu_alloc_domain_nested() stores that return value
in gdom_info-&gt;hdom_id, which is a u32, and only then tests it:

	gdom_info-&gt;hdom_id = amd_iommu_pdom_id_alloc();
	if (gdom_info-&gt;hdom_id &lt;= 0) {

The assignment discards the sign, so -ENOSPC becomes 0xffffffe4 and the
test never fires.  The nested domain is then set up with a host domain ID
that was never allocated, instead of the allocation failing with -ENOSPC.

Keep the value in an int, test it there, and store it only once it is
known to be valid, which is what the other amd_iommu_pdom_id_alloc()
callers already do.

Fixes: 757d2b1fdf5b ("iommu/amd: Introduce gDomID-to-hDomID Mapping and handle parent domain invalidation")
Signed-off-by: Hemanth Selam &lt;hemanth.selam@gmail.com&gt;
Reviewed-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Fix premature break in init_iommu_one() again</title>
<updated>2026-09-07T12:38:58+00:00</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-08-24T06:29:07+00:00</published>
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<id>urn:sha1:eb29b7bbc8ba28bbb0b9fdd655e931e1d1fa625c</id>
<content type='text'>
Commit 283d245468a2 ("iommu/amd: Fix premature break in
init_iommu_one()") unintentionally broke older platforms - such as
the ASRockRack B550D4-4L - where the BIOS advertises incorrect IOMMU
features.

Move the HATDis check ahead of the GASup check, and re-introduce the
break inside the GASup check to restore correct behavior on affected
platforms.

This is a short-term fix to resolve the regression. Longer term, we
should rework how EFRs are tracked and prioritize the MMIO-advertised
EFR over the one reported via IVRS. That requires more extensive
changes and will be addressed separately.

Fixes: 283d245468a2 ("iommu/amd: Fix premature break in init_iommu_one()")
Reported-by: Andreas Juch &lt;andreas@juch.cc&gt;
Closes: https://lore.kernel.org/linux-iommu/07b2d390-f7a0-47e2-bc2c-eb0853acf52e@juch.cc/
Tested-by: Andreas Juch &lt;andreas@juch.cc&gt;
Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Do not reallocate GA log buffers on resume</title>
<updated>2026-09-07T12:37:20+00:00</updated>
<author>
<name>Karl Mehltretter</name>
<email>kmehltretter@gmail.com</email>
</author>
<published>2026-08-19T03:23:49+00:00</published>
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<id>urn:sha1:00a7dd64888d6dd72110b40e2824a088cf7b7386</id>
<content type='text'>
Commit c5e1a1eb9279 ("iommu/amd: Simplify and Consolidate Virtual APIC
(AVIC) Enablement") moved the GA log allocation from iommu_init_pci()
to enable_iommus_vapic(), which is called on every resume.

iommu_init_ga_log() assigns iommu-&gt;ga_log and iommu-&gt;ga_log_tail
unconditionally. Each resume therefore replaces the boot-time pointers
and leaks both old allocations. The function also uses GFP_KERNEL from a
syscore resume callback, where interrupts are disabled and the non-boot
CPUs are offline.

Return early if both buffers are already allocated. Clear the pointers
in free_ga_log() so a partial allocation failure cannot leave ga_log
dangling.

Fixes: c5e1a1eb9279 ("iommu/amd: Simplify and Consolidate Virtual APIC (AVIC) Enablement")
Assisted-by: Claude:claude-opus-5
Signed-off-by: Karl Mehltretter &lt;kmehltretter@gmail.com&gt;
Reviewed-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Reviewed-by: Ankit Soni &lt;Ankit.Soni@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge branches 'arm/smmu/updates', 'arm/smmu/bindings', 'mediatek', 'qualcomm/msm', 'rockchip', 'ti/omap', 'riscv', 'intel/vt-d', 'amd/amd-vi', 'core' and 'typos' into next</title>
<updated>2026-08-11T07:12:19+00:00</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2026-08-11T07:12:19+00:00</published>
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<id>urn:sha1:3c6a2bac15247bc4f28125247ff89165324612fe</id>
<content type='text'>
</content>
</entry>
<entry>
<title>iommu/amd: Add SNP page mode 0 support</title>
<updated>2026-08-11T07:03:57+00:00</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-08-11T05:22:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=cb2860ad6c4ff7e15bb69c7e3a6842bbea743229'/>
<id>urn:sha1:cb2860ad6c4ff7e15bb69c7e3a6842bbea743229</id>
<content type='text'>
Newer AMD IOMMUs supports DTE[Mode]=0 for SNP-enabled system. This is
detected using new feature bit (EFR2[SNP_Page_Mode_0_Sup]). If this
feature is enabled, then IOMMU supports:
  - Passthrough mode (i.e. iommu=pt)
  - amd_iommu=pgtbl_v2: Forcing Linux DMA-API to use IOMMU v2 page table
  - Setting up device for SVA mode in the host.

Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Reviewed-by: Suravee Suthikulpanit &lt;suravee.suthikulpanit@amd.com&gt;
Tested-by: Amandeep Kaur Longia &lt;AmandeepKaur.Longia@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Fix GN bit setting in COMPLETE_PPR_REQUEST command</title>
<updated>2026-08-11T07:02:56+00:00</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-08-11T04:09:00+00:00</published>
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<id>urn:sha1:c94252cd5bbcdab3b1a9a25c638302678fa7721f</id>
<content type='text'>
The GN bit in the COMPLETE_PPR_REQUEST command indicates whether the
device is operating under a guest (v2) page table. Currently,
dev_data-&gt;pri_tlp is incorrectly used to derive this bit. However,
pri_tlp indicates whether the device uses PRI TLP which is unrelated
to page table mode.

Fix this by refactoring amd_iommu_complete_ppr() into a static internal
helper __amd_iommu_complete_ppr() that accepts an explicit 'gn' argument.
The amd_iommu_complete_ppr() wrapper then derives the GN bit correctly
from the device's active protection domain via pdom_is_v2_pgtbl_mode().

In the INVALID_PPR_REQUEST error handling path, the device's protection
domain may not be accessible, so derive the GN bit directly from the
EVENT_FLAG_PPR_GN flag in the event log entry instead.

While at it, change the 'gn' parameter type in build_complete_ppr()
from u8 to bool to better reflect its semantics.

Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Reviewed-by: Ankit Soni &lt;Ankit.Soni@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
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