kernel/git/stable/linux.git/drivers/phy/qualcomm/Makefile, branch master

phy: qcom: qmp-pcie: Add QMP PCIe Multi-PHY driver

2026-08-11T16:54:03+00:00

Some QMP PCIe PHY hardware blocks support multiple link topologies (e.g. x8 or x4+x4) selected via a TCSR register. The existing single-instance QMP PCIe PHY driver has no way to model this: it assumes a single cfg per DT node and instantiates exactly one PHY. Add a dedicated driver for this class of PHY. Match data carries a per-mode cfg table; qmp_pcie_multiphy_probe() reads the current link mode from the TCSR register pointed to by "qcom,link-mode", looks up the corresponding cfg array, and instantiates one qmp_pcie per sub-PHY required by that link mode, registering the clock and #phy-cells = <1> phy providers so consumers can address individual sub-PHYs by index. The driver inherits the phy setting and link-mode programmed by firmware, so only the no_csr reset is used and no phy setting tables are provided. Add the first match data and compatible, qcom,glymur-qmp-gen5x8-pcie-phy, for the Glymur Gen5 PCIe PHY that can bifurcate into two x4 links or operate as a single x8 link. Reviewed-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Signed-off-by: Qiang Yu Link: https://patch.msgid.link/20260807-glymur_linkmode_0807-v9-2-dd1c7e236e29@oss.qualcomm.com Signed-off-by: Vinod Koul

phy: qcom: Add M31 based eUSB2 PHY driver

2025-06-15T16:28:52+00:00

SM8750 utilizes an eUSB2 PHY from M31. Add the initialization sequences to bring it out of reset and into an operational state. This differs to the M31 USB driver, in that the M31 eUSB2 driver will require a connection to an eUSB2 repeater. This PHY driver will handle the initialization of the associated eUSB2 repeater when required. Reviewed-by: Dmitry Baryshkov Signed-off-by: Wesley Cheng Signed-off-by: Melody Olvera Link: https://lore.kernel.org/r/20250527-sm8750_usb_master-v6-6-d58de3b41d34@oss.qualcomm.com Signed-off-by: Vinod Koul

phy: move phy-qcom-snps-eusb2 out of its vendor sub-directory

2025-05-14T10:43:37+00:00

As not only Qualcomm, but also Samsung is using the Synopsys eUSB2 IP (albeit with a different register layout) in their newer SoCs, move the driver out of its vendor sub-directory and rename it to phy-snps-eusb2. Suggested-by: Krzysztof Kozlowski Signed-off-by: Ivaylo Ivanov Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20250504144527.1723980-4-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Vinod Koul

phy: qcom: Introduce PCIe UNIPHY 28LP driver

2025-03-11T11:21:01+00:00

Add Qualcomm PCIe UNIPHY 28LP driver support present in Qualcomm IPQ5332 SoC and the phy init sequence. Reviewed-by: Dmitry Baryshkov Signed-off-by: Nitheesh Sekar Signed-off-by: Varadarajan Narayanan Link: https://lore.kernel.org/r/20250220094251.230936-3-quic_varada@quicinc.com Signed-off-by: Vinod Koul

phy: qcom: qmp-usb: split USB-C PHY driver

2024-01-23T14:06:54+00:00

In preparation to adding Type-C handling for MSM8998, QCM2290 and SM6115 platforms, create new QMP USB-C PHY driver by splitting mentioned platforms to a separate file. In future it will also be extended with support for the DisplayPort handling. It will also be reused later for such platforms as SDM660, SM6125, SM6150. Signed-off-by: Dmitry Baryshkov Acked-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240113-pmi632-typec-v2-10-182d9aa0a5b3@linaro.org Signed-off-by: Vinod Koul

phy: qcom: Introduce M31 USB PHY driver

2023-08-22T13:58:11+00:00

Add the M31 USB2 phy driver for the USB M31 PHY (https://www.m31tech.com) found in Qualcomm IPQ5018, IPQ5332 SoCs. Signed-off-by: Varadarajan Narayanan Reviewed-by: Bjorn Andersson Link: https://lore.kernel.org/r/c8821bb0124a54cc774a2ff7b9c40df28eb7711e.1691999761.git.quic_varada@quicinc.com Signed-off-by: Vinod Koul

phy: qcom-qmp-usb: split off the legacy USB+dp_com support

2023-07-12T16:57:41+00:00

When adding support for some of the platforms (sc7180, sc8180x, sdm845, sm8[1234]50), we added USB PHYs for the combo USB+DP QMP PHYs. Now all such usecases were migrated to use USB+DP Combo driver. To simplify the qcom-qmp-usb PHY driver split the legacy USB+dp_com support into a separate driver. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20230531023415.1209301-6-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul

phy: qcom: add the SGMII SerDes PHY driver

2023-06-21T12:15:10+00:00

Implement support for the SGMII/SerDes PHY present on various Qualcomm platforms. Signed-off-by: Bartosz Golaszewski Link: https://lore.kernel.org/r/20230619091336.194914-4-brgl@bgdev.pl Signed-off-by: Vinod Koul

phy: qualcomm: fix indentation in Makefile

2023-06-21T12:15:10+00:00

Align all entries in Makefile. Signed-off-by: Bartosz Golaszewski Reviewed-by: Andrew Halaney Link: https://lore.kernel.org/r/20230619091336.194914-2-brgl@bgdev.pl Signed-off-by: Vinod Koul

phy: qcom: Add QCOM SNPS eUSB2 repeater driver

2023-02-16T13:10:27+00:00

PM8550B contains a eUSB2 repeater used for making the eUSB2 from SM8550 USB 2.0 compliant. This can be modelled SW-wise as a Phy. So add a new phy driver for it. Signed-off-by: Abel Vesa Link: https://lore.kernel.org/r/20230208190200.2966723-5-abel.vesa@linaro.org Signed-off-by: Vinod Koul