<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/stable/linux.git/include/dt-bindings/interconnect, branch linux-5.11.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-5.11.y</id>
<link rel='self' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-5.11.y'/>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/'/>
<updated>2020-11-30T16:42:47+00:00</updated>
<entry>
<title>dt-bindings: interconnect: sdm845: Add IDs for the QUP ports</title>
<updated>2020-11-30T16:42:47+00:00</updated>
<author>
<name>Georgi Djakov</name>
<email>georgi.djakov@linaro.org</email>
</author>
<published>2020-11-05T13:52:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=8742bb4bf203814b09572b615b5aeab000bf6248'/>
<id>urn:sha1:8742bb4bf203814b09572b615b5aeab000bf6248</id>
<content type='text'>
The QUP ports exist in the topology, but are not exposed as an
endpoints in DT. Fix this by creating IDs and attach them to their
NoCs, so that the various QUP drivers (i2c/spi/uart etc.) are able
to request their interconnect paths and scale their bandwidth.

Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
Link: https://lore.kernel.org/r/20201105135211.7160-1-georgi.djakov@linaro.org
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: interconnect: Add EPSS L3 DT binding on SM8250</title>
<updated>2020-09-08T13:29:01+00:00</updated>
<author>
<name>Sibi Sankar</name>
<email>sibis@codeaurora.org</email>
</author>
<published>2020-09-08T13:29:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=c4877059e0a4b88b59bc208f2608dc489553cf29'/>
<id>urn:sha1:c4877059e0a4b88b59bc208f2608dc489553cf29</id>
<content type='text'>
Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SM8250
SoCs.

Signed-off-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20200801123049.32398-5-sibis@codeaurora.org
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: interconnect: Add generic qcom bindings</title>
<updated>2020-09-08T13:28:54+00:00</updated>
<author>
<name>Mike Tipton</name>
<email>mdtipton@codeaurora.org</email>
</author>
<published>2020-09-03T19:21:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=65e0e4d67983dca775fc9ea39f092bc76caa495f'/>
<id>urn:sha1:65e0e4d67983dca775fc9ea39f092bc76caa495f</id>
<content type='text'>
Add generic qcom interconnect bindings that are common across platforms. In
particular, these include QCOM_ICC_TAG_* macros that clients can use when
calling icc_set_tag().

Signed-off-by: Mike Tipton &lt;mdtipton@codeaurora.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20200903192149.30385-3-mdtipton@codeaurora.org
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: interconnect: Add Qualcomm SM8250 DT bindings</title>
<updated>2020-09-08T13:28:50+00:00</updated>
<author>
<name>Jonathan Marek</name>
<email>jonathan@marek.ca</email>
</author>
<published>2020-07-28T02:38:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=cb6ffd717c9ea48f2a4f577bb128a51b3ed33fc3'/>
<id>urn:sha1:cb6ffd717c9ea48f2a4f577bb128a51b3ed33fc3</id>
<content type='text'>
The Qualcomm SM8250 platform has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.

Signed-off-by: Jonathan Marek &lt;jonathan@marek.ca&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Link: https://lore.kernel.org/r/20200728023811.5607-4-jonathan@marek.ca
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: interconnect: Add Qualcomm SM8150 DT bindings</title>
<updated>2020-09-08T13:28:49+00:00</updated>
<author>
<name>Jonathan Marek</name>
<email>jonathan@marek.ca</email>
</author>
<published>2020-07-28T02:38:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=3fe3578c8a3e18d809ad4541ff708918509e89dd'/>
<id>urn:sha1:3fe3578c8a3e18d809ad4541ff708918509e89dd</id>
<content type='text'>
The Qualcomm SM8150 platform has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.

Signed-off-by: Jonathan Marek &lt;jonathan@marek.ca&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Link: https://lore.kernel.org/r/20200728023811.5607-3-jonathan@marek.ca
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
</content>
</entry>
<entry>
<title>interconnect: imx: Add platform driver for imx8mn</title>
<updated>2020-04-28T17:03:02+00:00</updated>
<author>
<name>Leonard Crestez</name>
<email>leonard.crestez@nxp.com</email>
</author>
<published>2020-04-28T17:03:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=4b54bf4763e3725dcceaac379df4ef78df3b9fcd'/>
<id>urn:sha1:4b54bf4763e3725dcceaac379df4ef78df3b9fcd</id>
<content type='text'>
Add a platform driver for the i.MX8MN SoC describing bus topology, based
on internal documentation.

Signed-off-by: Leonard Crestez &lt;leonard.crestez@nxp.com&gt;
Link: https://lore.kernel.org/r/338a5409ce88811ba6c940ba06441db3faa8c187.1586174566.git.leonard.crestez@nxp.com
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
</content>
</entry>
<entry>
<title>interconnect: imx: Add platform driver for imx8mq</title>
<updated>2020-04-28T17:03:02+00:00</updated>
<author>
<name>Leonard Crestez</name>
<email>leonard.crestez@nxp.com</email>
</author>
<published>2020-04-28T17:03:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=63fc8029b37ef22aefa5288211ccc92c3f40def0'/>
<id>urn:sha1:63fc8029b37ef22aefa5288211ccc92c3f40def0</id>
<content type='text'>
Add a platform driver for the i.MX8MQ SoC describing bus topology,
based on internal documentation.

Signed-off-by: Leonard Crestez &lt;leonard.crestez@nxp.com&gt;
Tested-by: Martin Kepplinger &lt;martin.kepplinger@puri.sm&gt;
Link: https://lore.kernel.org/r/864310d1f2599c3bd621e70b77028a6e89f6410e.1586174566.git.leonard.crestez@nxp.com
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
</content>
</entry>
<entry>
<title>interconnect: imx: Add platform driver for imx8mm</title>
<updated>2020-04-28T17:03:02+00:00</updated>
<author>
<name>Leonard Crestez</name>
<email>leonard.crestez@nxp.com</email>
</author>
<published>2020-04-28T17:03:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=2c1966af073c3469e886e8f4c4c83403fe2ac857'/>
<id>urn:sha1:2c1966af073c3469e886e8f4c4c83403fe2ac857</id>
<content type='text'>
Add a platform driver for the i.MX8MM SoC describing bus topology.

Bandwidth adjustments is currently only supported on the DDRC and main
NOC. Scaling for the vpu/gpu/display NICs could be added in the future.

Signed-off-by: Alexandre Bailon &lt;abailon@baylibre.com&gt;
Signed-off-by: Leonard Crestez &lt;leonard.crestez@nxp.com&gt;
Link: https://lore.kernel.org/r/b14eef179dbd837a486619724b8033490f49db72.1586174566.git.leonard.crestez@nxp.com
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: interconnect: Add OSM L3 DT bindings</title>
<updated>2020-03-03T17:02:52+00:00</updated>
<author>
<name>Sibi Sankar</name>
<email>sibis@codeaurora.org</email>
</author>
<published>2020-03-03T17:02:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=7a077f7fdaa4fa641c43a554db2811c62048d7f4'/>
<id>urn:sha1:7a077f7fdaa4fa641c43a554db2811c62048d7f4</id>
<content type='text'>
Add bindings for Operating State Manager (OSM) L3 interconnect provider
on SDM845 SoCs.

Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Link: https://lore.kernel.org/r/20200227105632.15041-3-sibis@codeaurora.org
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: interconnect: Add Qualcomm SC7180 DT bindings</title>
<updated>2020-03-03T17:02:52+00:00</updated>
<author>
<name>Odelu Kukatla</name>
<email>okukatla@codeaurora.org</email>
</author>
<published>2020-03-03T17:02:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=c77af39bdb8b0f0605b484428a65ec0d97ba18dc'/>
<id>urn:sha1:c77af39bdb8b0f0605b484428a65ec0d97ba18dc</id>
<content type='text'>
The Qualcomm SC7180 platform has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.

Signed-off-by: Odelu Kukatla &lt;okukatla@codeaurora.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/1583241493-21212-2-git-send-email-okukatla@codeaurora.org
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
</content>
</entry>
</feed>
