kernel/git/stable/linux.git/sound/soc/codecs, branch linux-3.2.y

ASoC: wm8985: Refactor set_pll code to avoid gcc warnings

2017-11-11T13:34:43+00:00

commit 5f3d25c08dee44a40229f1f9e8934f3217478a67 upstream. Refactor set_pll code to avoid the following warnings: sound/soc/codecs/wm8985.c:852:50: warning: 'pll_div.k' may be used uninitialized in this function sound/soc/codecs/wm8985.c:849:9: warning: 'pll_div.n' may be used uninitialized in this function sound/soc/codecs/wm8985.c:848:23: warning: 'pll_div.div2' may be used uninitialized in this function Do the same as in commit 86ce6c9a (ASoC: WM8804: Refactor set_pll code to avoid GCC warnings). Signed-off-by: Fabio Estevam Signed-off-by: Mark Brown Signed-off-by: Ben Hutchings

ASoC: wm8993: Refactor set_pll code to avoid GCC warnings

2017-11-11T13:34:43+00:00

commit 6757d8cc0c6ff2e61972d84797d358a2f69f2217 upstream. Refactor set_pll code to avoid the following warnings: sound/soc/codecs/wm8983.c:873:40: warning: 'pll_div.k' may be used uninitialized in this function [-Wuninitialized] sound/soc/codecs/wm8983.c:870:9: warning: 'pll_div.n' may be used uninitialized in this function [-Wuninitialized] sound/soc/codecs/wm8983.c:869:23: warning: 'pll_div.div2' may be used uninitialized in this function [-Wuninitialized] Do the same as in commit 86ce6c9a (ASoC: WM8804: Refactor set_pll code to avoid GCC warnings). Signed-off-by: Fabio Estevam Signed-off-by: Mark Brown Signed-off-by: Ben Hutchings

ASoC: wm_hubs: Silence reg_r and reg_l 'may be used uninitialized' warnings

2017-11-11T13:34:42+00:00

commit 1f5353e765fe2a1168477bfe55e4dd7cdd96b477 upstream. Return an error from wm_hubs_read_dc_servo() if hubs->dcs_readback_mode is not correctly initialized. You might as well bail out since nothing is likely to work correctly afterwards. sound/soc/codecs/wm_hubs.c:321:11: warning: 'reg_r' may be used uninitialized in this function [-Wuninitialized] sound/soc/codecs/wm_hubs.c:251:13: note: 'reg_r' was declared here sound/soc/codecs/wm_hubs.c:322:11: warning: 'reg_l' may be used uninitialized in this function [-Wuninitialized] sound/soc/codecs/wm_hubs.c:251:6: note: 'reg_l' was declared here gcc version 4.6.3 Signed-off-by: Tim Gardner Signed-off-by: Mark Brown [bwh: Backported to 3.2: There's no separate wm_hubs_read_dc_servo() function, so return directly from calibrate_dc_servo().] Signed-off-by: Ben Hutchings

ASoC: adau1373: adau1373_hw_params: Silence overflow warning

2017-11-11T13:34:42+00:00

commit 14a1b8ca172f4cfbc544051a729d85a380447a82 upstream. ADAU1373_BCLKDIV_SOURCE is defined as BIT(5) which uses UL constants. On amd64 the result of the ones complement operator is then truncated to unsigned int according to the prototype of snd_soc_update_bits(). I think gcc is correctly warning that the upper 32 bits are lost. sound/soc/codecs/adau1373.c: In function 'adau1373_hw_params': sound/soc/codecs/adau1373.c:940:3: warning: large integer implicitly truncated to unsigned type [-Woverflow] gcc version 4.6.3 Add 2 more BCLKDIV mask macros as explained by Lars: The BCLKDIV has three fields. The bitclock divider (bit 0-1), the samplerate (bit 2-4) and the source select (bit 5). Here we want to update the bitclock divider field and the samplerate field. When I wrote the code I was lazy and used ~ADAU1373_BCLKDIV_SOURCE as the mask, which for this register is functionally equivalent to ADAU1373_BCLKDIV_SR_MASK | ADAU1373_BCLKDIV_BCLK_MASK. Signed-off-by: Tim Gardner Acked-by: Lars-Peter Clausen Signed-off-by: Mark Brown Signed-off-by: Ben Hutchings

ASoC: wm8994: Fix enum ctl accesses in a wrong type

2016-04-01T00:54:36+00:00

commit 8019c0b37cd5a87107808300a496388b777225bf upstream. The DRC Mode like "AIF1DRC1 Mode" and EQ Mode like "AIF1.1 EQ Mode" in wm8994 codec driver are enum ctls, while the current driver accesses wrongly via value.integer.value[]. They have to be via value.enumerated.item[] instead. Signed-off-by: Takashi Iwai Signed-off-by: Mark Brown Signed-off-by: Ben Hutchings

ASoC: wm8958: Fix enum ctl accesses in a wrong type

2016-04-01T00:54:36+00:00

commit d0784829ae3b0beeb69b476f017d5c8a2eb95198 upstream. "MBC Mode", "VSS Mode", "VSS HPF Mode" and "Enhanced EQ Mode" ctls in wm8958 codec driver are enum, while the current driver accesses wrongly via value.integer.value[]. They have to be via value.enumerated.item[] instead. Signed-off-by: Takashi Iwai Signed-off-by: Mark Brown [bwh: Backported to 3.2: adjust context] Signed-off-by: Ben Hutchings

ASoC: wm8962: correct addresses for HPF_C_0/1

2015-12-30T02:25:55+00:00

commit e9f96bc53c1b959859599cb30ce6fd4fbb4448c2 upstream. From datasheet: R17408 (4400h) HPF_C_1 R17409 (4401h) HPF_C_0 17048 -> 17408 (0x4400) 17049 -> 17409 (0x4401) Signed-off-by: Sachin Pandhare Acked-by: Charles Keepax Signed-off-by: Mark Brown [bwh: Backported to 3.2: wm8962_reg is a sparse array, not an array of { offset, value } pairs] Signed-off-by: Ben Hutchings

ASoC: wm8960: the enum of "DAC Polarity" should be wm8960_enum[1]

2015-08-12T14:33:15+00:00

commit a077e81ec61e07a7f86997d045109f06719fbffe upstream. the enum of "DAC Polarity" should be wm8960_enum[1]. Signed-off-by: Zidan Wang Acked-by: Charles Keepax Signed-off-by: Mark Brown Signed-off-by: Ben Hutchings

ASoC: wm8955: Fix setting wrong register for WM8955_K_8_0_MASK bits

2015-08-12T14:33:12+00:00

commit 12c350050538c7dc779c083b7342bfd20f74949c upstream. WM8955_K_8_0_MASK bits is controlled by WM8955_PLL_CONTROL_3 rather than WM8955_PLL_CONTROL_2. Signed-off-by: Axel Lin Acked-by: Charles Keepax Signed-off-by: Mark Brown Signed-off-by: Ben Hutchings

ASoC: wm8903: Fix define for WM8903_VMID_RES_250K

2015-08-12T14:33:12+00:00

commit ebb6ad73e645b8f2d098dd3c41d2ff0da4146a02 upstream. VMID Control 0 BIT[2:1] is VMID Divider Enable and Select 00 = VMID disabled (for OFF mode) 01 = 2 x 50kΩ divider (for normal operation) 10 = 2 x 250kΩ divider (for low power standby) 11 = 2 x 5kΩ divider (for fast start-up) So WM8903_VMID_RES_250K should be 2 << 1, which is 4. Signed-off-by: Axel Lin Signed-off-by: Mark Brown Signed-off-by: Ben Hutchings