kernel/git/stable/linux.git/tools/testing/cxl, branch linux-7.2.y

cxl/test: Rework cxl_type2_mem_init() to use cxl_mock_platform_device_add()

2026-09-14T11:39:28+00:00

[ Upstream commit 9515af581da976911aea820175afb05be803ae8c ] cxl_type2_mem_init() is used to set up mock CXL type2 memory device for cxl testing, it introduces a known bug fixed by the following commit: commit d90f236f8b9e ("cxl/test: Update mock dev array before calling platform_device_add()") Mock CXL devices require updating the mock device array prior to platform_device_add(), otherwise, the CXL subsystem could fail to recognize the newly added mock device. Switch to cxl_mock_platform_device_add() helper to resolve this ordering issue. Besides, this patch also includes two minor changes. 1. Preserve the original error code returned by cxl_mock_platform_device_add(), rather than unconditionally overriding it with -ENOMEM. 2. Drop redundant NULL check before platform_device_unregister(), as the function internally handles NULL pointer. Fixes: 6b2e585142e6 ("cxl/test: Add hierarchy enumeration support for type2 device") Signed-off-by: Li Ming Reviewed-by: Dave Jiang Link: https://patch.msgid.link/20260713061531.56322-1-ming.li@zohomail.com Signed-off-by: Dave Jiang Signed-off-by: Sasha Levin

cxl/test: Propagate -ENOMEM on platform_device_alloc() failures

2026-09-14T11:39:08+00:00

[ Upstream commit 98ba41c3236b9a3bad206dbd9cf18c98ced75726 ] Set rc = -ENOMEM at every platform_device_alloc() failure site in cxl_rch_topo_init(), cxl_single_topo_init() and cxl_test_init() so the failure is propagated and the module load aborts cleanly. The cxl_acpi allocation site originates in the commit below, while the host-bridge/root-port/uport/dport allocation sites fixed here were added later in the single-host and RCH topology configs. Fixes: 67dcdd4d3b83 ("tools/testing/cxl: Introduce a mocked-up CXL port hierarchy") Fixes: e41c8452b9b2 ("tools/testing/cxl: Add a single-port host-bridge regression config") Fixes: c9435dbee119 ("tools/testing/cxl: Add an RCH topology") Assisted-by: Claude:claude-opus-4-8 Tested-by: Alison Schofield Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20260629221104.3891733-6-dave.jiang@intel.com Signed-off-by: Dave Jiang Signed-off-by: Sasha Levin

cxl/test: Add hierarchy enumeration support for type2 device

2026-09-14T11:39:08+00:00

[ Upstream commit 6b2e585142e68b4af821a1eca4d1e8d54bd49bb8 ] Add enumeration of type2 device hierarchy in cxl-test. The type2 device is setup to be directly attached to a root port instead of rp -> switch -> device that type3 hierarchy is setup.. Tested-by: Alison Schofield Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20260629221104.3891733-5-dave.jiang@intel.com Signed-off-by: Dave Jiang Stable-dep-of: 98ba41c3236b ("cxl/test: Propagate -ENOMEM on platform_device_alloc() failures") Signed-off-by: Sasha Levin

cxl/test: Refactor platform device enumerations

2026-09-14T11:39:08+00:00

[ Upstream commit a6d37152d284a49249a545861d1094cb678b5d32 ] Split all the host bridges, rootports, upstream and downstream ports enumerations to separate helper functions. This should make adding type2 hierarchy easier later on. Tested-by: Alison Schofield Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20260629221104.3891733-4-dave.jiang@intel.com Signed-off-by: Dave Jiang Stable-dep-of: 98ba41c3236b ("cxl/test: Propagate -ENOMEM on platform_device_alloc() failures") Signed-off-by: Sasha Levin

cxl/test: Add test for module parameters

2026-09-14T11:39:08+00:00

[ Upstream commit afae0fa7c6b163339a5d357942b89956a0820e45 ] Add a test for module paraters during module init to make sure that only one is activated. [dj: Dropped counting fail_autoassemble modparm. (Alison) ] Suggested-by: Alison Schofield Tested-by: Alison Schofield Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20260629221104.3891733-2-dave.jiang@intel.com Signed-off-by: Dave Jiang Stable-dep-of: 98ba41c3236b ("cxl/test: Propagate -ENOMEM on platform_device_alloc() failures") Signed-off-by: Sasha Levin

Replace by more specific (c files)

2026-07-03T05:38:17+00:00

Replace the #include of by the more specific where applicable. For most cases the include can be dropped completely, only a few drivers need one or two headers added. Acked-by: Danilo Krummrich Acked-by: Takashi Sakamoto Acked-by: Bjorn Helgaas Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König (The Capable Hub)

Merge branch 'for-7.2/cxl-type2-attach-region' into cxl-for-next

2026-06-12T20:47:53+00:00

cxl: Add dummy function for cxl_memdev_attach_region for !CONFIG_CXL_REGION cxl/region: Introduce devm_cxl_probe_mem() cxl/memdev: Introduce cxl_class_memdev_type cxl/memdev: Pin parents for entire memdev lifetime cxl/region: Resolve region deletion races cxl/region: Block region delete during region creation

cxl/region: Introduce devm_cxl_probe_mem()

2026-06-12T20:47:30+00:00

To date, platform firmware maps accelerator memory and accelerator drivers simply want an address range that they can map themselves. This typically results in a single region being auto-assembled upon registration of a memory device. Use the @attach mechanism of devm_cxl_add_memdev() parameter to retrieve that region while also adhering to CXL subsystem locking and lifetime rules. As part of adhering to current object lifetime rules, if the region or the CXL port topology is invalidated, the CXL core arranges for the accelertor driver to be detached as well. The locking and lifetime rules were validated with Dave's work-in-progress cxl-type-2 support for cxl_test. devm_cxl_add_classdev() supports the general memory expansion flow where region assembly is optional, dynamic, and user controlled. Cc: Alejandro Lucero Signed-off-by: Dan Williams Reviewed-by: Alejandro Lucero Tested-by: Alejandro Lucero Reviewed-by: Dave Jiang Link: https://patch.msgid.link/20260519210158.1499795-6-djbw@kernel.org Signed-off-by: Dave Jiang

tools/testing/cxl: Resolve auto-region decoder targets like real HW

2026-06-12T15:14:46+00:00

The mock auto-region created at module load wrote switch and host-bridge decoder target[] directly, in addition to target_map[]. Real HW programs only target_map[] and resolves target[] as dports enumerate, via update_decoder_targets(). Region replay already follows that ordering, the initial auto-region did not. Drop the direct target[] writes and call cxl_port_update_decoder_targets() so target[] is resolved the same way as real HW and region replay, exercising more of the auto-region driver path. This is inspired by the discussion [1] below: [1]: https://lore.kernel.org/all/20260521084806.28232-1-icheng@nvidia.com/ Suggested-by: Alison Schofield Signed-off-by: Richard Cheng Reviewed-by: Alison Schofield Reviewed-by: Dave Jiang Tested-by: Dave Jiang Link: https://patch.msgid.link/20260612011227.4220-1-icheng@nvidia.com Signed-off-by: Dave Jiang

cxl/test: Add check after kzalloc() memory in alloc_mock_res()

2026-06-12T01:08:34+00:00

alloc_mock_res() calls kzalloc() without checking the return value. Add scope based resource management to deal with the allocated memory cleanly. Reported-by: sashiko-bot Fixes: 67dcdd4d3b83 ("tools/testing/cxl: Introduce a mocked-up CXL port hierarchy") Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20260611230305.197390-1-dave.jiang@intel.com Signed-off-by: Dave Jiang