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2026-07-31KVM: VMX: Fix stale PID-pointer table entry left after vCPU freeDmytro Maluka
vCPU creation in kvm_vm_ioctl_create_vcpu() may fail after kvm_arch_vcpu_create() -> vmx_vcpu_create() already succeeded. In such case kvm_vm_ioctl_create_vcpu() destroys the newly created vCPU in the failure path. However, that leaves a side effect: the IPIv pid_table entry remains configured with this vCPU's pi_desc address. As a result, when another vCPU sends an IPI to the APIC ID of this failed-to-create vCPU, it will cause HW to write to this (freed!) pi_desc memory. [*] Fix this by clearing the pid_table entry when destroying the vCPU. Note that the same issue exists for SVM AVIC as well [1], to be fixed. [*] Although, since this memory is freed into the kvm_vcpu_cache kmem cache which is only used for allocating kvm_vcpus, _maybe_ this memory will only be reused for pi_desc of another vCPU, not for anything else. So _maybe_ this will only result in delivering the IPI to a wrong vCPU (possibly of another VM) in the worst case, not in a random corruption of kernel memory. Link: https://lore.kernel.org/kvm/al4rNqpBYy8FGKPw@blrnaveerao1 [1] Signed-off-by: Dmytro Maluka <dmaluka@chromium.org> Reviewed-by: Kai Huang <kai.huang@intel.com> Link: https://patch.msgid.link/20260729170621.308809-3-dmaluka@chromium.org Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: Check for duplicate vcpu_id as early as possibleDmytro Maluka
If userspace tries to create a vCPU with the same vcpu_id as an existing one, kvm_vm_ioctl_create_vcpu() checks for that and fails with -EEXIST only after it already created the vCPU via kvm_arch_vcpu_create(). As a result, even though this newly created vCPU is destroyed in the failure path, the fact that it is temporarily created with an invalid vcpu_id and that there are temporarily two vCPUs with the same vcpu_id is a potential source of subtle issues. In particular, this prevents fixing an VMX IPIv issue where a stale entry left in the VM's PI descriptor table after the vCPU is destroyed in the failure path. The right way to fix that issue is to clear that entry when destroying the vCPU, however right now that would have a nasty side effect: since the same entry is used for the other, previously created vCPU with same vcpu_id, clearing it would mean effectively disabling IPIv for that existing good vCPU. So to avoid this and similar problems, check for duplicate vcpu_id as early in the vCPU creation path as possible, before kvm_arch_vcpu_create() and even before kvm_arch_vcpu_precreate(). Simply moving the existing kvm_get_vcpu_by_id() check earlier doesn't work, as kvm->lock is dropped and reacquired, i.e. moving kvm_get_vcpu_by_id() would introduce a race: 1. vCPU A is being created but not installed in kvm->vcpu_array yet. 2. vCPU B with the same vcpu_id is being created. It passes the duplicated vcpu_id check, since the check doesn't find vCPU A in kvm->vcpu_array. 3. vCPU A is installed in kvm->vcpu_array, vCPU creation succeeds. 4. vCPU B with the same vcpu_id is installed in kvm->vcpu_array, vCPU creation succeeds. So introduce the bitmap of vcpu_ids used by the VM, in order to safely check if the given vcpu_id is used and mark is as used before releasing kvm->lock first time. Alternatively, KVM could use another Xarray[*] for roughly the same code complexity, which would minimize KVM's steady state memory footprint at the cost of higher runtime latency (to allocate and free entries). Given that the worst case scenario is 256 bytes per-VM (on x86, which allows up to 16KiB vCPU IDs), go with the slightly simpler approach until there's a need to save memory. Suggested-by: Sean Christopherson <seanjc@google.com> Link: https://lore.kernel.org/kvm/al6eg7C-2sDBEAFD@google.com [*] Signed-off-by: Dmytro Maluka <dmaluka@chromium.org> Reviewed-by: Kai Huang <kai.huang@intel.com> Link: https://patch.msgid.link/20260729170621.308809-2-dmaluka@chromium.org [sean: massage changelog] Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: x86: Document APIC base address constraint for in-kernel irqchipTim Wiederhake
When virtual APIC access acceleration is enabled (APICv on Intel, AVIC on AMD), vcpu creation installs a private memory slot at the default APIC base address (0xfee00000). If a user memory region overlaps this address, vcpu creation fails with EEXIST. The same error occurs when installing an overlapping user memory region after vcpu creation. This also applies when using KVM_CAP_SPLIT_IRQCHIP. This constraint is not documented anywhere. Add a note to the KVM_CREATE_IRQCHIP and KVM_CAP_SPLIT_IRQCHIP documentation. Signed-off-by: Tim Wiederhake <twiederh@redhat.com> Link: https://patch.msgid.link/20260708133856.302151-3-twiederh@redhat.com [sean: call out "subsequent vcpu creation"] Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: x86: Document that KVM_CREATE_IRQCHIP must precede vCPU creationTim Wiederhake
The kernel rejects KVM_CREATE_IRQCHIP with -EINVAL if any vCPUs have already been created, but the API documentation does not mention this constraint. Add a note. Signed-off-by: Tim Wiederhake <twiederh@redhat.com> Link: https://patch.msgid.link/20260708133856.302151-2-twiederh@redhat.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31PCI: host-common: Add link down handling for Root PortsManivannan Sadhasivam
The PCIe link, when down, needs to be recovered to bring it back. But on some platforms, that cannot be done in a generic way as link recovery procedure is platform specific. Add a new pci_host_handle_link_down() that could be called by the host bridge drivers for a specific Root Port when the link goes down. pci_host_handle_link_down() accepts a 'pci_dev' corresponding to the Root Port that observed the link down event. If CONFIG_PCIEAER is enabled, it calls pcie_do_recovery() with 'pci_channel_io_frozen' as the state. This will result in the execution of the AER Fatal error handling code. Since the link down recovery is pretty much the same as AER Fatal error handling, reuse pcie_do_recovery() here. The AER .error_detected() callback will be triggered for all of the downstream devices, but not for the Root Port itself as there is nothing to do for the Root Ports in the callbacks. Finally, pci_host_reset_root_port() will be called for the Root Port, which will reset the Root Port using the .reset_root_port() callback to recover the link. Once that's done, resume message will be broadcasted to the bridge and the downstream devices, indicating successful link recovery. But if CONFIG_PCIEAER is not enabled in the kernel, only pci_host_reset_root_port() will be called, which will in turn call pci_bus_error_reset() to just reset the Root Port as there is no way we could inform the drivers about link recovery. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Brian Norris <briannorris@chromium.org> Tested-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Tested-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260729-pci-port-reset-v9-3-53570b92064d@oss.qualcomm.com
2026-08-01Revert "pinctrl: s32cc: implement GPIO functionality"Linus Walleij
This reverts commit 94cb9e8f270797e489633cfa53d2d44afecb8bef. This collides with orthogonal changes in the GPIO tree, we need to rebase it and apply it to the GPIO tree instead. Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-07-31x86/cpu: Use parsed CPUID(0x1)Ahmed S. Darwish
On early boot CPU detection, use parsed CPUID(0x1) instead of a direct CPUID query. Beside the parser's centralization benefits, use the auto generated CPUID data types, and their C99 bitfields, instead of doing ugly bitwise operations. [ bp: - Use a common code pattern for l1 of fetching and checking it right after that - flip the check to save an indentation level - align assignments vertically. ] Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260528153923.403473-12-darwi@linutronix.de
2026-07-31power: supply: max17040: drop incorrect I2C functionality checkJianing Li
max17040_probe() rejects adapters that do not advertise I2C_FUNC_SMBUS_BYTE. The driver does not issue SMBus byte transactions, however. Its regmap has 8-bit registers and 16-bit big-endian values, for which regmap-i2c supports either raw I2C transfers or SMBus word-data transactions. Consequently, an adapter providing raw I2C transfers or SMBus word data but not SMBus byte transactions is rejected even though regmap can access the device. Conversely, the current check can pass an adapter that regmap cannot use. Drop the stale check and let devm_regmap_init_i2c() validate and select the supported transfer method. Fixes: 6455a8a84bdfd ("power: supply: max17040: Use regmap i2c") Cc: stable@vger.kernel.org Signed-off-by: Jianing Li <m13940358460@163.com> Link: https://patch.msgid.link/20260731084259.916-1-m13940358460@163.com [Fixed Fixes tag, so that it points to the regmap introduction instead of the initial driver addition] Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2026-08-01Merge tag 'drm-xe-next-2026-07-30' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/xe/kernel into drm-next - Wait on external BO kernel fences in exec IOCTL (Brost) - General clean-up (Anas) - Documentation fix (Rafael) - Add a debugfs for pcode information (Karthik) - Free madvise VMA array on L2 flush failure (Guangshuo) - Page Table related fixes (Shuicheng, Zongyao) - Improvements GuC error handling and GuC small fixes (Sk, Zhanjun, Arvind) - Add new W/As (Daniele, Harish) - GuC paging engine support (Auld) - Add and use more KLV helpers (Michal) - Balance exec queue suspend/resume (Niranjana, Thomas) - Fix BO prefetch with CONSULT_MEM_ADVISE_PREF_LOC (Himal) - SRIOV: Disable display in admin only PF mode (Satya) - Fix writable override for CRI NVM (Sasha) - Fix VF CCS attach/detach race with in-flight BO moves (Brost) - Introduce Xe Uncorrectable Error Handling (Riana) - Fix WOPCM size for LNL+ (Daniele) - Consolidate debugfs fault injection functions (Mallesh) - Multi-queue related fixes and improvements (Niranjana, Jagmeet, Shuicheng) - Add RAS GPU health indicator (Soham) - PAT related improvements (Roper, Sanjay) - NULL deref fix on migration on VF (Satya) - i2c related fix (Raag) - Fix SVM leak and clean up xe_vm_create (Shuicheng) - Drop force_probe requirement for NVL-s (Gustavo) - Optimise TT population for DONTNEED BOs (Auld) - Add page size allocation mode control and coverage (Himal, Nareshkumar) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/amt2kDVdyBK6VEyU@intel.com
2026-07-31Merge tag 'devicetree-fixes-for-7.2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Fix NULL bus dereference in of_pci_range_parser_one() - Prevent out-of-bounds access when too many dynamic reserved memory regions are defined * tag 'devicetree-fixes-for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: of/address: Fix NULL bus dereference in of_pci_range_parser_one() of: reserved_mem: prevent OOB when too many dynamic regions are defined
2026-07-31KVM: selftests: Extend the invalid nVMX guest state test to cover RSMHao Zhang
Extend the invalid nVMX guest state to cover RSM, i.e. to validate that KVM synthesizes SHUTDOWN for L1 if SMRAM is clobbered with invalid guest state during an L2 => SMI => RSM => L2 sequence. Note, unlike the existing testcase, clobbering SMRAM should result in L1, not L2, getting SHUTDOWN / TRIPLE_FAULT, as RSM is architecturally defined to trigger shutdown if the CPU detects invalid state. Signed-off-by: Hao Zhang <hao_zhang_kdev@163.com> Co-developed-by: Sean Christopherson <seanjc@google.com> Link: https://patch.msgid.link/20260731173340.2644656-7-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Refactor invalid nVMX state test to prepare for RSM testcaseSean Christopherson
In the invalid nVMX guest state test, extract the creation of the VM and initial running of the vCPU to get to L2 into helpers so that the common code can be reused to extend the test to also cover RSM. Eliminate the unnecessary global "vm", and opportunistically free the VM after the testcase as there's zero reason not to. Opportunistically assert that L2 is never resumed after the I/O exit to L1, e.g. to guard against false passes. Link: https://patch.msgid.link/20260731173340.2644656-6-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Use port 0x80 in invalid nVMX guest state testSean Christopherson
Use port 0x80 instead of 0x2000 to trigger an L2 => L0 VM-Exit in the nVMX invalid guest state test, so that the test can be expanded to cover RSM in the L2 => SMI => L2 path without having to manually encode a MOV to DX (the immediate form of IN only supports an imm8). Use port 0x80 as it's a well-known port and is used by other tests, e.g. in the coalesced I/O test. Link: https://patch.msgid.link/20260731173340.2644656-5-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: x86: Rework kvm_x86_ops.vcpu_pre_run() into .vcpu_needs_initialization()Sean Christopherson
Rework .vcpu_pre_run() into a more specific .vcpu_needs_initialization() to consolidate the SNP and TDX control flows, and to eliminate the potentially confusing almost-collision between svm_vcpu_pre_run() and pre_sev_run(): the former is SEV specific, but is pre-KVM_RUN, whereas the latter is pre-VMRUN. Link: https://patch.msgid.link/20260731173340.2644656-4-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: nVMX: Synthesize SHUTDOWN on RSM if L2 requires emulationSean Christopherson
Synthesize SHUTDOWN (for L1) if L2 requires unhandleable emulation after loading guest state from SMRAM during RSM to prevent a misbehaving L1 (or userspace via L1) from tripping the sanity check that KVM doesn't try to cancel a pending nested VM-Enter. If SMRAM is modified such that RSM will load what should be impossible state for L2, then KVM will detect that it needs to emulate the current code stream and will abort VM-Entry to L2. And because KVM (rightly) expects such a scenario to be impossible, KVM WARNs and bugs the VM. __ret && !(vcpu->kvm)->vm_bugged WARNING: arch/x86/kvm/vmx/vmx.c:6741 at vmx_handle_exit+0x65/0x790 [kvm_intel], CPU#13: vmx_invalid_nes/2902 Modules linked in: kvm_intel kvm irqbypass [last unloaded: kvm] CPU: 13 UID: 1000 PID: 2902 Comm: vmx_invalid_nes Tainted: G W 7.2.0-rc2 #124 PREEMPT Tainted: [W]=WARN Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 0.0.0 02/06/2015 RIP: 0010:vmx_handle_exit+0x65/0x790 [kvm_intel] Call Trace: <TASK> kvm_arch_vcpu_ioctl_run+0xdf8/0x1d00 [kvm] kvm_vcpu_ioctl+0x2d5/0x960 [kvm] __x64_sys_ioctl+0x8a/0xd0 do_syscall_64+0xb7/0x570 entry_SYSCALL_64_after_hwframe+0x4b/0x53 </TASK> Alternatively, KVM could suppress the WARN for the RSM case, but that would still leave the vCPU in a "bad" state that KVM doesn't know how to handle (which is also why KVM rejects attempts to do KVM_RUN when the vCPU is loaded with invalid state). And architecturally, the Intel SDM explicitly states that RSM leads to shutdown if the CPU detects invalid state. Fixes: 2bb8cafea80b ("KVM: vVMX: signal failure for nested VMEntry if emulation_required") Reported-by: Hao Zhang <zhanghao1@kylinos.cn> Link: https://patch.msgid.link/20260731173340.2644656-3-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: x86: Extract VMX's unhandleable emulation check to common x86Sean Christopherson
Expose VMX's check for unhandleable emulation as its own kvm_x86_ops hook, and move the actual pre-KVM_RUN check into common x86. This will allow sharing the core logic with KVM's RSM emulation without needed to add a post-RSM hook, and is a step towards removing the .vcpu_pre_run() hook entirely. Alternatively, KVM could provide a post-RSM hook as mentioned, but pre/post hooks tend to be unwieldy as the exact "timing" of the call often matters greatly. E.g. in this case, the call must slot in exactly between loading guest state from SMRAM and the hack to force the vCPU out of L2 on SHUTDOWN. Link: https://patch.msgid.link/20260731173340.2644656-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Add KVM syscall wrappers for pthread_{g,s}etaffinity_np()Sean Christopherson
Add and use KVM wrappers for pthread_{g,s}etaffinity_np() so that selftests don't need to manually assert that the syscalls succeeded, and so that they don't need to manually pass in sizeof(cpu_set_t) for the size. Link: https://patch.msgid.link/20260731195612.2697986-12-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31x86/lib: Add CPUID(0x1) family and model calculationAhmed S. Darwish
The x86 library provides x86_family() and x86_model(). They take raw CPUID register output and calculate the CPU family and model from it. In follow-up work, the x86 subsystem will use APIs which access previously-parsed CPUID leafs structure instead of doing direct CPUID queries. These new APIs force using the auto generated leaf data types at <asm/cpuid/leaf_types.h>. Introduce x86 family and model calculation functions that take these auto-generated data types. Refactor the original code so that no logic is duplicated. [ bp: Massage commit message, unbreak too long line. ] Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260528153923.403473-11-darwi@linutronix.de
2026-07-31KVM: selftests: Clean up global constants in hardware disable testSean Christopherson
Rename the global constants in the hardware disable test to better capture what they control, and open code the literal number of sleeping tasks and iterations instead of using power-of-2 math to express values that are 100% arbitrary. Opportunistically tag the global semaphore with "static". No functional change intended. Link: https://patch.msgid.link/20260731195612.2697986-13-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Add helper APIs to cancel+join pthreadsSean Christopherson
Deduplicate test code that does cancel()+join() on pthreads by adding a collection of syscall wrappers. The tests that asynchronously cancel pthreads, i.e. use PTHREAD_CANCEL_ASYNCHRONOUS, are particularly ugly, especially since it's not immediately obvious why those tests assert on the thread being CANCELED, whereas others do not. No functional change intended. Link: https://patch.msgid.link/20260731195612.2697986-11-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Add KVM syscall wrappers for pthread_{cancel,join}()Sean Christopherson
Add and use KVM wrappers for pthread_{cancel,join}() so that selftests don't need to manually assert that the syscalls succeeded. Note, the vast majority tests don't actually assert success, but they all obviously rely on the syscall to succeed. Other than explicitly failing if a syscall fails, no functional change intended. Link: https://patch.msgid.link/20260731195612.2697986-10-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Add KVM syscall wrapper for pthread_create()Sean Christopherson
Add and use a KVM wrapper for pthread_create() syscall so that selftests don't need to manually assert that the syscall succeeded. Note, most tests don't actually assert success, but they all obviously rely on the syscall to succeed. Other than explicitly failing if pthread_create() fails, no functional change intended. Link: https://patch.msgid.link/20260731195612.2697986-9-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Drop unreachable, dead code from hardware disable testSean Christopherson
Drop all of the code that is unreachable in the hardware disable test, as it adds a lot of noise that makes the test seem far more complicated than it actually is. Link: https://patch.msgid.link/20260731195612.2697986-8-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Affine threads to random CPUs in hardware disable testSean Christopherson
Affine the worker threads to random CPUs in the hardware disable test, and honor the starting CPU set in the process. Hardcoding to CPUs 0-3 is both wrong and less interesting than running on random CPUs. Opportunistically convert the local 'i' to an int, as the macros it tests against are signed, and using 'i' as an iterator is conventionally declared as an int. Link: https://patch.msgid.link/20260731195612.2697986-7-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Extract picking of random CPU from cpu_set_t to separate APISean Christopherson
Extract kvm_pick_random_cpu() out of pin_task_to_random_cpu() so that tests can choose a random CPU without having to immediately pin a task to that CPU. No functional change intended. Link: https://patch.msgid.link/20260731195612.2697986-6-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Return the target CPU from pin_task_to_random_cpu()Sean Christopherson
When pinning a task to a random CPU, return which CPU the task was pinned to so that the caller can do things like avoid running other tasks on the target CPU. Link: https://patch.msgid.link/20260731195612.2697986-5-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Pre-set threads affinity in hardware disable test when possibleSean Christopherson
When building against a libc that provides pthread_attr_setaffinity_np(), pre-set the grandchildren threads CPU affinity in the hardware disable test to further reduce the perceived latency of pthread_create(). On large NUMA systems, this reduces the average runtime from ~10s to ~5s. Link: https://patch.msgid.link/20260731195612.2697986-4-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Set threads CPU affinity before doing work in hardware ↵Sean Christopherson
disable test Affine worker threads to their target pCPU set *before* doing any work in the hardware disable test. When running a preemptible kernel on a NUMA system with a large number of CPUs (100+ of CPUs), waiting to set the affinity of the grandchildren until after the grandchild is fully spun up results in total test runtimes of over a minute, presumably due to cross-node NUMA penalties and scheduler lock contention. E.g. from the perspective of the caller, when waiting to affine the tasks, pthread_create() takes ~100x longer. Link: https://patch.msgid.link/20260731195612.2697986-3-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: selftests: Add a KVM syscall wrapper for sched_setaffinity()Sean Christopherson
Add and use a KVM wrapper for sched_setaffinity() so that selftests don't need to manually assert that the syscall succeeded. No functional change intended. Link: https://patch.msgid.link/20260731195612.2697986-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31ASoC: dapm: Add encoder and decoder widget types to kcontrol handlingSeppo Ingalsuo
This patch fixes the issue where encoder or decoder widget types are assigned kcontrols in a topology but get ignored. The controls were parsed successfully but were not registered as ALSA kcontrols. In dapm_create_or_share_kcontrol() the snd_soc_dapm_encoder and the snd_soc_dapm_decoder are added to the switch statement to be handled similarly as e.g. the snd_soc_dapm_effect for assigning a proper long control name. In dapm_widget_show_component() the snd_soc_dapm_encoder and the snd_soc_dapm_decoder are added to switch statement to let them to be shown in the debugfs power state output. In snd_soc_dapm_new_widgets() the snd_soc_dapm_encoder and the snd_soc_dapm_decoder are added to same switch case handling as e.g. snd_soc_dapm_effect to be registered with dapm_new_pga(). The previous operation with default in the switch statement silently ignored them. Note: Despite the function name, the dapm_new_pga() is generic utility that calls dapm_create_or_share_kcontrol() for each kcontrol of the widget. Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://patch.msgid.link/20260730125600.6491-1-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-31KVM: VMX: Cap VMX preemption timer to work around Intel erratumJim Mattson
Due to a widespread Intel erratum (e.g. EMR158), programming the VMX-preemption timer with certain large values may cause the timer to expire earlier than expected. The recommended workaround is to cap the VMX-preemption timer value to strictly less than: 2^25 * CPUID.15H:EBX[31:0] / CPUID.15H:EAX[31:0]. Calculate the maximum "safe" preemption timer value during hardware setup based on CPUID 15H when available, and use the adjusted max value in all locations where KVM currently hardcodes the max architectural value, including in the subtle case where KVM soft-disables the timer. Don't apply the workaround when running as a VM, because absent explicit enumeration to state the bug is present (or not), it's L0's responsibility to faithfully emulate/virtualize the VMX preemption timer. WARN if the above logic would result in a max value of zero and fall back to the maximum architectural value, as the expectation is that real hardware will never provide problematic EAX/EBX values (which is another reason to ignore the erratum when running as a VM; there's less chance of a false positive on the WARN due to L0 providing an unanticipated ratio). Reported-by: Sean Christopherson <seanjc@google.com> Closes: https://lore.kernel.org/all/Zn9X0yFxZi_Mrlnt@google.com/ Suggested-by: Chao Gao <chao.gao@intel.com> Assisted-by: Gemini:Gemini-Next Reviewed-by: Chao Gao <chao.gao@intel.com> Signed-off-by: Jim Mattson <jmattson@google.com> Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com> [sean: track inclusive max instead of exclusive limit, massage changelog] Link: https://patch.msgid.link/20260731171926.2629627-3-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: VMX: Bury all of the VMX preemption timer code under CONFIG_X86_64=ySean Christopherson
Double down on using the VMX preemption timer only for 64-bit kernels, and bury the setup and runtime adjustment code, and all global variables, under CONFIG_X86_64=y. This will allow addressing a widespread Intel erratum without running afoul of unused-but-set-variable and __udivdi3() errors on 32-bit kernels. No functional change intended. Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com> Reviewed-by: Chao Gao <chao.gao@intel.com> Link: https://patch.msgid.link/20260731171926.2629627-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31x86/cpu: Use parsed CPUID(0x0)Ahmed S. Darwish
Use parsed CPUID(0x0) instead of a direct CPUID query. [ bp: Drop the unnecessary NULL check. ] Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260528153923.403473-10-darwi@linutronix.de
2026-07-31Merge tag 'hyperv-fixes-signed-20260731' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux Pull hyper-v fixes from Wei Liu: - Multiple fixes for the MSHV driver (Stanislav Kinsburskii, Wei Liu, Yi Xie, Yousef Alhouseen) - Multiple fixes for the VMBus driver (Hardik Garg, Michael Kelley, Sebastian Andrzej Siewior) * tag 'hyperv-fixes-signed-20260731' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux: mshv_vtl: bounds-check cpu index in vtl mmap fault handler mshv: Publish VP to pt_vp_array before installing the file descriptor Drivers: hv: vmbus: add VTL2 redirect connection ID mshv: Order pt_vp_array publish against irqfd assertion path mshv: Fix missing error code on VP allocation failure mshv: Fix level-triggered check on uninitialized data mshv: Fix race in mshv_irqfd_deassign mshv: Use kfree_rcu in mshv_portid_free mshv: Fix sleeping under spinlock in mshv_portid_alloc mshv: Fix duplicate GSI detection for GSI 0 Drivers: hv: vmbus: Remove vmbus_irq_initialized Drivers: hv: vmbus: Replace lockdep_hardirq_threaded() with lockdep annotation mshv_vtl: fix fd leak in mshv_ioctl_create_vtl() mshv_vtl: clear hypercall output before copyout Drivers: hv: vmbus: Set DMA coherent mask for VMBus devices mshv: fix hv_input_get_system_property struct
2026-07-31unicode: Properly reject invalid encoding version stringsGabriel Krisman Bertazi
Casefolding filesystems can request a specific version of UTF-8 at mount-time. utf8_parse_version then assembles the "major.minor.rev" string into an unsigned int. There were two issues with the parser logic: first, individual fields are read as signed int, allowing negative numbers, second, an overflowed field will result in unexpected results. Something like the below actually succeeds to mount using utf8-12.1.0. mount -t tmpfs -o casefold=utf8-12.0.256 none /mnt [ 10.867859] tmpfs: Using encoding : utf8-12.1.0 Signed-off-by: Gabriel Krisman Bertazi <krisman@suse.de>
2026-07-31spi: ma35d1-qspi: Add Nuvoton MA35D1 QSPI controllerMark Brown
Chi-Wen Weng <cwweng.linux@gmail.com> says: Add devicetree binding and SPI controller driver support for the Quad SPI controller found in Nuvoton MA35D1 SoCs. The controller provides two native chip selects and supports standard SPI and spi-mem operations using single, dual and quad bus widths. This initial implementation uses 8-bit PIO transfers and supports per-operation clock configuration, clock and reset handling, and direct execution of SPI memory operations. DMA and active-high chip select support are intentionally left out of the initial driver. Link: https://patch.msgid.link/20260731023818.1626075-1-cwweng.linux@gmail.com
2026-07-31spi: ma35d1-qspi: Add Nuvoton MA35D1 QSPI controller supportChi-Wen Weng
Add SPI controller driver support for the Quad SPI controller found in Nuvoton MA35D1 SoCs. The controller provides two native chip selects and supports standard SPI and spi-mem operations, including single-bit full-duplex transfers and dual or quad half-duplex transfers. Implement 8-bit PIO transfers, per-operation clock configuration, clock and reset handling, and direct execution of SPI memory operations. Limit individual transfers to 4 KiB and SPI messages to 8 KiB to keep the PIO polling path bounded. Read the optional num-cs property and fall back to the hardware default of two chip selects when it is not present. Active-high chip select and DMA transfers are not supported by this initial implementation. Signed-off-by: Chi-Wen Weng <cwweng@nuvoton.com> Link: https://patch.msgid.link/20260731023818.1626075-3-cwweng.linux@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-31dt-bindings: spi: nuvoton,ma35d1-qspi: Add Nuvoton MA35D1 QSPIChi-Wen Weng
Add a devicetree binding for the Quad SPI controller found in Nuvoton MA35D1 SoCs. The controller supports SPI memory devices such as SPI NOR and SPI NAND flashes. It has one register range, one clock input and one reset line, and supports up to two chip selects. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Chi-Wen Weng <cwweng@nuvoton.com> Link: https://patch.msgid.link/20260731023818.1626075-2-cwweng.linux@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-31Merge tag 'trace-tools-v7.2-rc5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace Pull RTLA fix from Steven Rostedt: - Fix timerlat top actions triggering on signal Fix a bug in RTLA's timerlat top actions feature where on-threshold actions are triggered on any signal, regardless of whether a latency spike had actually occurred during the measurement. The return retval was checked for non-zero to do actions. But if a signal came in, it returns a negative and actions were being incorrectly triggered when they should not have been. * tag 'trace-tools-v7.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace: rtla/timerlat_top: Fix on-threshold actions firing on signal
2026-07-31utf8: Remove unused utf8_normalizeDr. David Alan Gilbert
utf8_normalize() was added in 2019 as part of commit 9d53690f0d4e ("unicode: implement higher level API for string handling") but has remained unused. (I think because the other higher level routines added by that patch normalise as part of their operations) Remove it. Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Signed-off-by: Gabriel Krisman Bertazi <krisman@suse.de>
2026-08-01Merge tag 'drm-intel-next-2026-07-28' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next drm/i915 feature pull #2 for v7.3: Features and functionality: - Enable UHBR link rates on Thunderbolt tunneled links (Imre) - Reduce Xe3+ PM demand peak bandwidth for power savings (Vinod) - Add the blend mode property to all planes that support alpha blending (Chaitanya) - Enable pipe DMC error interrupts for display 30+ (Dibin) - Add KUnit tests for DP link config selection and fallback (Imre) Refactoring and cleanups: - Refactor DP link config selection and unify across use cases (Imre) - Unify i915 and xe display runtime PM calls (Jani) - Refactor BIOS framebuffer takeover (Ville) Fixes: - Fix HD audio on DP UHBR SST (Kai Vehmanen) - Fixes to xe driver BIOS framebuffer takeover (Ville) - Fix 2 pixels-per-clock CDCLK calculation to avoid underruns (Ville) - Fix incorrectly set VSC SDP Main Stream Attribute (Chaitanya) - Fix BPC and DSC selection for HDMI sinks (Alexander Kaplan) - Fix PCON max FRL rate selection (Alexander Kaplan) - Workaround Xe3P PSR2 screen corruption (Dibin) - Fix NVL A & B stepping vtotal setting (Suraj) - Fix xe DPT allocation paths (Maarten) - Prefer system memory instead of stolen for new framebuffers in xe (Maarten) - Fix transcoder mask sizes (John Harrison) - Clear stale UV/Y plane DDB entries on plane disable (Vinod) - Fix some DP AUX backlight control issues, again (Suraj) - Fix switching between HDCP 1.4 and 2.2 authentication (Suraj) - Remove unnecessary Xe2_LPD+ FBC plane width and surface size limits (Vinod) - Ensure non-zero DSB safe window for PTL+ (Ankit) - Fix bandwidth calculation to account for 16 DRAM channels (Uma) - Fix NV12 ceiling division for bigjoiner case (Vidya) DRM core changes: - Add Thunderbolt UHBR tunneling support (Imre) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patch.msgid.link/cb1b5a644d75589cbcdcc8ec8160968140426439@intel.com
2026-07-31mshv_vtl: bounds-check cpu index in vtl mmap fault handlerYi Xie
cpu is taken from pgoff & 0xffff. cpu_online() does not reject cpu >= nr_cpu_ids, and per_cpu_ptr() can then walk off __per_cpu_offset. Signed-off-by: Yi Xie <xieyi@kylinos.cn> Reviewed-by: Naman Jain <namjain@linux.microsoft.com> Signed-off-by: Wei Liu <wei.liu@kernel.org>
2026-07-31mshv: Publish VP to pt_vp_array before installing the file descriptorStanislav Kinsburskii
mshv_partition_ioctl_create_vp() called anon_inode_getfd() before publishing the new VP into partition->pt_vp_array. anon_inode_getfd() includes fd_install(), so the fd was live in current->files before the publish ran. A concurrent MSHV_RUN_VP ioctl on that fd does not serialise against the in-progress MSHV_CREATE_VP — it takes vp->vp_mutex, not the partition mutex. Once the VP starts running and traps, mshv_intercept_isr() can look up partition->pt_vp_array[vp_index] and observe NULL, silently dropping the intercept message. Split the fd creation: reserve an fd with get_unused_fd_flags(), create the file with anon_inode_getfile(), publish the VP via smp_store_release(), and finally call fd_install() as the userspace-visibility commit point. Fixes: 621191d709b14 ("Drivers: hv: Introduce mshv_root module to expose /dev/mshv to VMMs") Signed-off-by: Stanislav Kinsburskii <skinsburskii@linux.microsoft.com> Reviewed-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com> Signed-off-by: Wei Liu <wei.liu@kernel.org>
2026-07-31Drivers: hv: vmbus: add VTL2 redirect connection IDHardik Garg
VMBus sends CHANNELMSG_INITIATE_CONTACT through a Hyper-V message connection ID. Older protocol versions use VMBUS_MESSAGE_CONNECTION_ID, while protocol version 5.0 and newer normally use VMBUS_MESSAGE_CONNECTION_ID_4. For a VTL2 kernel using VMBus protocol 5.0 or newer, the host may expect INITIATE_CONTACT on either the redirect connection ID or VMBUS_MESSAGE_CONNECTION_ID_4. There is no capability indication that identifies which ID is active, so the driver must determine it at runtime. During VMBus negotiation, the redirect ID is tried first because it is used by VTL2 configurations with VMBus redirection enabled. If the redirect ID is unavailable, the host rejects it synchronously with HV_STATUS_INVALID_CONNECTION_ID, allowing fallback to the standard ID. Return a distinct error for an invalid Initiate Contact connection ID so this fallback does not mask other post-message failures or protocol-version rejections. Preserve the existing connection ID selection for older protocol versions or when running below VTL2. Signed-off-by: Hardik Garg <hargar@linux.microsoft.com> Reviewed-by: Tianyu Lan <Tianyu.Lan@microsoft.com> Reviewed-by: Saurabh Sengar <ssengar@linux.microsoft.com> Reviewed-by: Naman Jain <namjain@linux.microsoft.com> Reviewed-by: Michael Kelley <mhklinux@outlook.com> Signed-off-by: Wei Liu <wei.liu@kernel.org>
2026-07-31mshv: Order pt_vp_array publish against irqfd assertion pathStanislav Kinsburskii
mshv_partition_ioctl_create_vp() initialises a VP struct (allocations, mutex_init, init_waitqueue_head, page mappings) and then publishes the pointer into partition->pt_vp_array. Several ISR paths read this array locklessly: the intercept ISR, the two scheduler ISRs, and mshv_try_assert_irq_fast() on the irqfd fast path. Of these, only mshv_try_assert_irq_fast() can structurally race the publish. It runs from an eventfd waker without holding pt_mutex, and MSHV_IRQFD does not require the target lapic_apic_id (== vp_index) to refer to an existing VP at registration time. A user can therefore register an irqfd targeting a yet-to-be-created VP, then trigger mshv_try_assert_irq_fast() concurrently with MSHV_CREATE_VP for the same index. On weakly-ordered architectures the reader can observe a non-NULL pointer in pt_vp_array before the initialising stores to the VP struct become visible, leading to use of partially-initialised fields (e.g. vp_register_page). The other ISR readers cannot reach this race: the hypervisor will not generate intercept or scheduler messages for a VP that has never been told to run, and the user can only call MSHV_RUN_VP on the VP fd returned by MSHV_CREATE_VP, which by construction is returned after the publish. Leave those readers as plain loads. Use smp_store_release() in mshv_partition_ioctl_create_vp() to publish the pointer, and pair it with smp_load_acquire() in mshv_try_assert_irq_fast(). On x86 these compile to plain accesses under TSO; on ARM64 they emit one-instruction acquire/release barriers, acceptable on this fast path. The destroy-side path (destroy_partition() clearing pt_vp_array[i] to NULL after kfree(vp)) has a separate ordering and lifetime concern that is out of scope here. Fixes: 621191d709b14 ("Drivers: hv: Introduce mshv_root module to expose /dev/mshv to VMMs") Signed-off-by: Stanislav Kinsburskii <skinsburskii@linux.microsoft.com> Reviewed-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com> Signed-off-by: Wei Liu <wei.liu@kernel.org>
2026-07-31mshv: Fix missing error code on VP allocation failureStanislav Kinsburskii
In mshv_partition_ioctl_create_vp(), when kzalloc for the VP struct fails, the code jumps to the cleanup path without setting ret. At that point ret is 0 from the preceding successful mshv_vp_stats_map() call, so the function returns success to userspace despite having failed to create the VP. No fd is installed and no VP is registered in pt_vp_array, but userspace has no way to know the operation failed. Set ret to -ENOMEM before jumping to the cleanup path. Fixes: 621191d709b14 ("Drivers: hv: Introduce mshv_root module to expose /dev/mshv to VMMs") Signed-off-by: Stanislav Kinsburskii <skinsburskii@linux.microsoft.com> Reviewed-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com> Signed-off-by: Wei Liu <wei.liu@kernel.org>
2026-07-31mshv: Fix level-triggered check on uninitialized dataStanislav Kinsburskii
In mshv_irqfd_assign(), the level-triggered validation for resample irqfds checks irqfd_lapic_irq.lapic_control.level_triggered before mshv_irqfd_update() has populated the field. Since the irqfd struct is zero-allocated, level_triggered is always 0 at that point, causing the check to always reject resample irqfds with -EINVAL. This makes level-triggered interrupt resampling — used to avoid interrupt storms with assigned devices — completely non-functional. Move the check after the mshv_irqfd_update() call, which resolves the IRQ routing entry and populates irqfd_lapic_irq with the actual trigger mode. Fixes: 621191d709b14 ("Drivers: hv: Introduce mshv_root module to expose /dev/mshv to VMMs") Signed-off-by: Stanislav Kinsburskii <skinsburskii@linux.microsoft.com> Reviewed-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com> Signed-off-by: Wei Liu <wei.liu@kernel.org>
2026-07-31mshv: Fix race in mshv_irqfd_deassignStanislav Kinsburskii
mshv_irqfd_deactivate() and the hlist traversal of pt_irqfds_list require pt->pt_irqfds_lock to be held, but mshv_irqfd_deassign() omits it. This races with the EPOLLHUP path in mshv_irqfd_wakeup(), which does take the lock before calling mshv_irqfd_deactivate(). Additionally, mshv_irqfd_deactivate() uses hlist_del() which poisons the node pointers rather than resetting them. Since mshv_irqfd_is_active() relies on hlist_unhashed() (checks pprev == NULL), a poisoned node still appears active. If a concurrent path calls mshv_irqfd_deactivate() again on the same irqfd, the guard fails to prevent a double hlist_del() on poisoned pointers. Fix both issues: - Add the missing spin_lock_irq/spin_unlock_irq around the list traversal in mshv_irqfd_deassign(), matching mshv_irqfd_release(). - Use hlist_del_init() instead of hlist_del() so the node is properly marked as unhashed after removal, making the is_active guard reliable. Fixes: 621191d709b14 ("Drivers: hv: Introduce mshv_root module to expose /dev/mshv to VMMs") Signed-off-by: Stanislav Kinsburskii <skinsburskii@linux.microsoft.com> Reviewed-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com> Signed-off-by: Wei Liu <wei.liu@kernel.org>
2026-07-31mshv: Use kfree_rcu in mshv_portid_freeStanislav Kinsburskii
mshv_portid_free() uses synchronize_rcu() followed by kfree() to reclaim port table entries. This blocks the caller until a full RCU grace period elapses, which is unnecessary since the same module already uses the non-blocking kfree_rcu() pattern in mshv_port_table_fini(). Replace with kfree_rcu() to avoid the blocking wait and keep the reclamation strategy consistent across the file. Signed-off-by: Stanislav Kinsburskii <skinsburskii@linux.microsoft.com> Reviewed-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com> Signed-off-by: Wei Liu <wei.liu@kernel.org>
2026-07-31ASoC: SOF: Intel: Handle ACE2+ link DMA allocation restrictionsMark Brown
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says: We have seen cases when the delay reporting unexpectedly behaves incorrectly, counters are not counting in hardware registers under seemingly random conditions. It turned out that there are few cases that the driver must handle in order to make sure that LLP, PPLC counters are working correctly: - non-alt links must not be reset during probe - Concurrent (cross-direction) hazard: when SoundWire shares a physical link DMA stream index with HDaudio, iDisp or UAOL across the two directions, the LLP and timestamp values for the affected stream are wrong. SSP and DMIC are not affected because every DMA request from those links carries one sample block. - Sequential (playback only) hazard: once a HDaudio or iDisp link has used a playback stream index, that index cannot drive any non HDA/iDisp link in the same direction until the next controller reset (CRST#). For users the impact was not visible as the link counter issue only affected the delay reporting which already have defensive path to filter out incorrect delays and the DSP caused delay for normal PCMs are negligible to cause A/V sync issues for example. Link: https://patch.msgid.link/20260730125130.29887-1-peter.ujfalusi@linux.intel.com