summaryrefslogtreecommitdiff
path: root/drivers/gpu
AgeCommit message (Collapse)Author
2026-07-01drm/amdgpu/gfx9.4.3: replace BUG_ON() with WARN_ON()Alex Deucher
There's no need to crash the kernel for these cases. Reviewed-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu/gfx9: replace BUG_ON() with WARN_ON()Alex Deucher
There's no need to crash the kernel for these cases. Reviewed-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: do not release the root bo after vm validateSunil Khatri
Make sure to not release the vm root bo after vm validation and to make that happen we moved the restore function within amdgpu_userq_vm_validate function. Also update the function name to reflect the intent. Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com> Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: move suballoc defines into own headerChristian König
Just some code cleanup, while at it remove outdated comment. No functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <felix.kuehling@amd.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu/gfx8: drop unecessary BUG_ON()Alex Deucher
There's no need to crash the kernel for this case. Reviewed-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Delete check_soft_reset() from amd_ip_funcsTimur Kristóf
This function is not called from anywhere anymore and every implementation was bogus. Some implementations checked busy flags of the IP blocks, which are not really indicative of whether the block is hung and needs to be reset. For example the blocks could be busy just normally executing submissions, and not need to be reset. Other implementations checked IB tests, which is actually more useful, but could still just indicate that an IP block is executing submissions normally. It is also unnecessary because the GPU recovery code path already knows which ring is hung so we know exactly what we need to reset. Just delete check_soft_reset() entirely. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Delete soft reset code from legacy display driverTimur Kristóf
This was basically dead code, not used or called from anywhere. Now that DC is the default display driver for all ASICs, it is unlikely that anyone wants to develop this further. Display hang related work should be focused on DC. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Delete GMC 8 soft resetTimur Kristóf
We should only reset the memory controller during ASIC reset and only when it's absolutely necessary. Otherwise, resetting the memory controller typically just breaks everything and on dGPUs may also clear the contents of VRAM (it's unclear if it really does, but it's likely). Specifically for GMC 8, the memory controller is reset as part of the ASIC reset and otherwise should be left alone. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Clean up defunct soft reset from ASIC reset code pathTimur Kristóf
Soft reset means resetting IP blocks individually using a hardware interconnect (SRBM or GRBM) without assistance from firmware. Soft reset is a useful tool for implementing GPU recovery, eg. it is already successfully used for SDMA queue resets. It should be used by a GPU recovery method instead of being called directly from the ASIC reset code path. Currently, this is only used on Carrizo and Stoney, but doesn't work well and fails on those chips. A subsequent commit will add a working GFX8 recovery implementation after the cleanups. Note that this commit only cleans up the ASIC reset path, which also unblocks more opportunities for cleanup for the various IP blocks. Those will be done in subsequent commits. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Clarify name of soft recovery to avoid confusionTimur Kristóf
Soft recovery is not the same as soft reset: * Soft recovery attempts to resolve a GPU hang by sending a command to terminate shaders. * Soft reset completely re-initializes an entire device IP block, which may affect multiple rings and jobs at the same time. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: bounds check xcp_id in release_schedLijo Lazar
Avoid out-of-bounds xcp[] access, e.g. when xcp_id is AMDGPU_XCP_NO_PARTITION. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu/gmc9: make all vmids available to KFD if KQs are disabledAlex Deucher
If the user has disabled kernel queues, then make all vmids available to HWS. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: validate vega10 profile mode inputsLijo Lazar
Check for out of range profile modes and custom params that exceed 8 bits. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: bounds check xcp ip block indexLijo Lazar
Check out of range values for ip block. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu/soc24: reset dGPU if suspend got abortedJakob Linke
For SOC24 ASICs (RDNA4 / Navi 4x dGPUs) re-enabling PM features fails if an S3 suspend got aborted, the same issue already handled for SOC21 and SOC15: commit df3c7dc5c58b ("drm/amdgpu: Reset dGPU if suspend got aborted") commit 38e8ca3e4b6d ("amdgpu/soc15: enable asic reset for dGPU in case of suspend abort") The aborted resume fails with: amdgpu: SMU: No response msg_reg: 6 resp_reg: 0 amdgpu: Failed to enable requested dpm features! amdgpu: resume of IP block <smu> failed -62 Apply the same workaround for soc24: detect the aborted-suspend state at resume via the sign-of-life register and reset the device before re-init. This is a workaround till a proper solution is finalized. Fixes: 98b912c50e44 ("drm/amdgpu: Add soc24 common ip block (v2)") Signed-off-by: Jakob Linke <jakob@linke.cx> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Validate ATPX buffer length before useLijo Lazar
Add amdgpu_atpx_buffer_validate() to check that the returned ACPI buffer is of type ACPI_TYPE_BUFFER, is large enough to hold the u16 size field, and that the BIOS-reported size does not exceed the actual allocation length or fall below the minimum required by the caller. Use it in VERIFY_INTERFACE and GET_PX_PARAMETERS callers. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Validate ATIF buffer length before useLijo Lazar
Add a min_size parameter to amdgpu_atif_call() to validate that the returned ACPI buffer is of type ACPI_TYPE_BUFFER, holds at least a u16 size field, does not claim more data than was actually returned, and meets the minimum size required by the calling function. Each caller passes its required minimum via sizeof() or offsetof() of the expected output struct and drops its own size check. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Use helper to get pptable in SMUv15Lijo Lazar
Use common helper function to get pptable from firmware binary in SMUv15. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Use helper to get pptable in SMUv14Lijo Lazar
Use common helper function to get pptable from firmware binary in SMUv14. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Use helper to get pptable in SMUv13Lijo Lazar
Use common helper function to get pptable from firmware binary in SMUv13. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Use helper to get pptable in SMUv11Lijo Lazar
Use common helper function to get pptable from firmware binary in SMUv11. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Add helper functions to fetch pptableLijo Lazar
PPTables could be embedded in firmware binaries with v2.0 or v2.1 format. Add a common helper to get pptable from firmware binaries. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: guard zero divisors in soc_v1_0 partition codeAsad Kamal
Abort driver load when num_mem_partitions is zero since operation is unreliable without valid memory partition info. Skip absent resources in soc_v1_0_get_xcp_res_info() to avoid divide-by-zero on firmware- reported zero instance counts. v2: Remove redundant checks (Lijo) v3: Return error instead when num_mem_partitions is zero (Lijo) Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: validate XCP topology counts before divisionAsad Kamal
In aqua_vanjaram_get_xcp_res_info(), max_res[i] can be zero. When res_lt_xcp is true the code divides num_xcp by max_res[i], causing a divide fault. Skip the loop body for absent resources. v2: Remove redundant checks (Lijo) Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Add helper for parameter parsingLijo Lazar
Add a helper function to extract long values passed in a string. The string may have values of multiple parameters separated by space char. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Fix mes remove_hw_queue lockAmber Lin
down_read/up_read adev->reset_domain semaphore should be placed around remove queue. v2: remove the empty function, recover_bad_queue_mes to avoid compile error on rhel Fixes: f401a2633e02 ("drm/amdgpu: Remove faulty queue before resume") Signed-off-by: Amber Lin <Amber.Lin@amd.com> Reviewed-by: Jesse Zhang <jesse.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Add checks to vbios fetch through ATRMLijo Lazar
Check if a valid buffer object is returned after ATRM call. Also, match the buffer length against requested size before copying. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Fix kobject cleanup in xcp sysfsLijo Lazar
Fix the indexing issue. Release the kobject whose init/add failed, and unwind the successfully added ones. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Remove output parameter in bo list handlingTvrtko Ursulin
Removing the output parameter from a few functions should result in more readable code and also enables us to save some lines. v2: fix build (Alex) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Replace idr with xarray in amdgpu_bo_listTvrtko Ursulin
IDR is deprecated so let's replace it with xarray. Conversion is mostly 1:1 apart from AMDGPU_BO_LIST_OP_UPDATE which was implemented with idr_replace, and has now been replaced with a sequence of xa_load and xa_cmpxchg. Should userspace attempt multi-threaded update operations on the same handle it could theoretically hit a new -ENOENT path. But I believe this is purely theoretical and still safe. Also, since we have removed the RCU protection around the handle lookup we also removed the RCU freeing of the list. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Remove the bo list mutexTvrtko Ursulin
The bo list is immutable during command submission since the drm_exec conversion so we can remove the mutex. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Drop support for variable struct drm_amdgpu_bo_list_entry sizeTvrtko Ursulin
Userspace always uses struct drm_amdgpu_bo_list_in->bo_info_size equal to sizeof(struct drm_amdgpu_bo_list_entry) and there are no plans to extend it. Even if the structure is extended at some point, older kernels will note that they do not support the additional fields by rejecting the new structure size. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Suggested-by: Christian König <christian.koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu/gfx9.4.3: add support for disabling kernel queuesAlex Deucher
Allow the user to disable kernel queues. This can be used to free up vmid and HQD resources if kernel queues are not needed. Set amdgpu.user_queue=2 to disable kernel queues. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: dump RAS EEPROM table via debugfsXiang Liu
When the RAS core manages the EEPROM, the eeprom_control is never initialized (amdgpu_ras_init_badpage_info() returns early), so reading ras/ras_eeprom_table in debugfs printed only a zeroed header and no records, even though bad-page records exist in the RAS core EEPROM. Source the table header and records from the RAS core EEPROM (ras_core->ras_eeprom) in that case, reusing the existing output layout so the debugfs node keeps the same format. Skip the dump when the firmware manages the EEPROM, since the records are not stored in the I2C-backed table then. Signed-off-by: Xiang Liu <xiang.liu@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01dma-buf: rename dma_fence_enable_sw_signalingChristian König
Dropping the _sw_ part from the names was proposed multiple times now and IIRC people generally agreed with the idea already. The function requests a fence to signal and triggers some sort of HW interaction on most backends. So this is not really software related at all and the callback is already just named enable_signaling as well. Just streamline that and use a consistent name everywhere. Assisted-by: Claude Sonet 4 Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Link: https://lore.kernel.org/r/20260624122917.2483-2-christian.koenig@amd.com
2026-07-01drm/i915/cmtg: Warn on invalid CMTG transcoder in intel_cmtg_disable()Animesh Manna
intel_cmtg_disable() indexes the per-transcoder register array using the CMTG transcoder returned by to_cmtg_transcoder(), which is only valid for TRANSCODER_A/B. The callers are now gated by intel_cmtg_is_allowed(), so reaching this function with an invalid CMTG transcoder should never happen. Add a drm_WARN_ON() that bails out early in that case, both to document the invariant and to guard against the out-of-bounds register access (trans_offsets[-1]) should a future caller get it wrong. v2: - Add an in-function INVALID_TRANSCODER drm_WARN_ON check. (Suraj) Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260629180236.1353704-3-animesh.manna@intel.com
2026-07-01drm/i915/display: Guard CMTG disable with intel_cmtg_is_allowed()Animesh Manna
intel_cmtg_disable() maps crtc_state->cpu_transcoder to a CMTG transcoder via to_cmtg_transcoder(), which only returns a valid transcoder for TRANSCODER_A/B. The disable call sites in hsw_crtc_disable() and the fastset/VRR path only check the sticky crtc->cmtg.enabled flag, so during a big-joiner reconfiguration that moves the eDP across pipes intel_cmtg_disable() can be reached with a crtc_state whose cpu_transcoder does not map to a CMTG transcoder. That results in a negative register-array index (trans_offsets[-1]) and a UBSAN array-index-out-of-bounds splat: UBSAN: array-index-out-of-bounds in .../display/intel_cmtg.c:187:24 intel_cmtg_disable+0x395/0x3d0 [xe] intel_old_crtc_state_disables+0xfb/0x1f0 [xe] intel_atomic_commit_tail+0xca6/0x2040 [xe] Gate both call sites with intel_cmtg_is_allowed() so that intel_cmtg_disable() is only invoked for configurations that actually map to a CMTG transcoder. v2: - Guard the intel_cmtg_disable() call sites with intel_cmtg_is_allowed() instead of a silent return (Suraj). Fixes: 3bb44e8d421a ("drm/i915/cmtg: Modify existing hook to disable CMTG") Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260629180236.1353704-2-animesh.manna@intel.com
2026-07-01drm/dp_mst: Handle torn-down topology gracefully in ↵Luca Coelho
drm_dp_mst_topology_queue_probe() A hotplug or link-loss event can tear down the MST topology (setting mgr->mst_state = false and mgr->mst_primary = NULL) concurrently with a caller invoking drm_dp_mst_topology_queue_probe(). Since the check is already performed under mgr->lock, the condition is not a programming error but a valid race -- the topology was valid when the caller decided to call this function, but was torn down before the lock was acquired. Replace the drm_WARN_ON() with a graceful early return. This eliminates spurious kernel warnings and the resulting compositor crashes observed when connecting/disconnecting DP MST monitors, while keeping the correct behavior of doing nothing when MST is not active. A drm_dbg_mst() trace is added so the skipped probe remains observable under MST debug logging. The existing WARN_ON(mgr->mst_primary) in drm_dp_mst_topology_mgr_set_mst() already catches the case where the topology is initialized twice, so no diagnostic coverage is lost. Fixes: dbaeef363ea5 ("drm/dp_mst: Add a helper to queue a topology probe") Cc: Imre Deak <imre.deak@intel.com> Cc: Lyude Paul <lyude@redhat.com> Cc: stable@vger.kernel.org Cc: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Jonas Emilsson <jonas.emilsson@gmail.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/all/20260503034533.1023686-1-jonas.emilsson@gmail.com Acked-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260622140532.526722-1-luciano.coelho@intel.com Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
2026-07-01drm/xe/i2c: Drop manual VF checkRaag Jadav
Clear has_i2c flag inside vf_update_device_info() instead of manually checking for VF instance. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patch.msgid.link/20260630091800.403926-1-raag.jadav@intel.com
2026-07-01drm/xe/pt: prevent invalid cursor access for purged BOsMatthew Auld
During a page table walk for binding, xe_pt_stage_bind() explicitly skips initializing the xe_res_cursor for purged BOs, treating them similarly to NULL VMAs by only setting the cursor size. However, xe_pt_hugepte_possible() and xe_pt_scan_64K() did not check if the BO was purged before attempting to walk the cursor using xe_res_dma() and xe_res_next(). Because the cursor was left uninitialized for purged BOs, this falls through and triggers warnings like: WARNING: drivers/gpu/drm/xe/xe_res_cursor.h:274 at xe_res_next Fix this by explicitly checking if the BO is purged in both xe_pt_hugepte_possible() and xe_pt_scan_64K(), returning early just as we do for NULL VMAs, avoiding the invalid cursor accesses entirely. As a precaution, also zero-initialize the cursor in xe_pt_stage_bind() to ensure we don't pass garbage data into the page table walkers if we ever hit a similar edge case in the future. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8418 Fixes: ad9843aac91a ("drm/xe/madvise: Implement purgeable buffer object support") Assisted-by: Copilot:gemini-3.1-pro-preview Reported-by: Matthew Schwartz <matthew.schwartz@linux.dev> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Arvind Yadav <arvind.yadav@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Tested-by: Matthew Schwartz <matthew.schwartz@linux.dev> Link: https://patch.msgid.link/20260625152054.450125-8-matthew.auld@intel.com
2026-07-01drm/xe: account for dontneed in fdinfo purgeableMatthew Auld
Now that Xe supports explicit madvise WILLNEED/DONTNEED states, userspace can mark memory in any placement as eligible for purging. Update bo_meminfo to also include any BO explicitly marked as DONTNEED in the purgeable statistics, ensuring fdinfo accurately reflects all memory offered up for reclamation. v2 (Sashiko): - Also update the drm_print_memory_stats() so we don't mask out != SYSTEM Assisted-by: Copilot:gemini-3.1-pro-preview Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Arvind Yadav <arvind.yadav@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260625152054.450125-7-matthew.auld@intel.com
2026-07-01drm/xe: fix NPD in bo_meminfo()Matthew Auld
When a buffer object is purged, its ttm.resource is set to NULL via the TTM pipeline gutting flow. However, the BO remains in the client's object list until userspace explicitly closes the GEM handle. If memory stats are queried during this time, accessing bo->ttm.resource->mem_type will result in a NULL pointer dereference. Fix this by safely skipping purged BOs in bo_meminfo, as they no longer consume any memory. User is getting NPD on device resume, and possible theory is that in bo_move(), if we need to evict something to SYSTEM to save the CCS state, but the BO is marked as dontneed, this won't trigger a move but will nuke the pages, leaving us with a NULL bo resource. And the meminfo() doesn't look ready to handle a NULL resource. v2 (Sashiko): - There could potentially be other cases where we might end up with a NULL resource, so make this a general NULL check for now. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8419 Fixes: ad9843aac91a ("drm/xe/madvise: Implement purgeable buffer object support") Assisted-by: Copilot:gemini-3.1-pro-preview Reported-by: Matthew Schwartz <matthew.schwartz@linux.dev> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Arvind Yadav <arvind.yadav@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Tested-by: Matthew Schwartz <matthew.schwartz@linux.dev> Link: https://patch.msgid.link/20260625152054.450125-6-matthew.auld@intel.com
2026-07-01drm/i915/bios: range check LFP Data Block panel_type2Jani Nikula
While the panel_type from LFP Data Block is range checked, panel_type2 is not. Add a few helpers for range checking, and use them to not only check panel_type2, but also improve clarity and correctness in the panel type selection. Discovered using AI-assisted static analysis confirmed by Intel Product Security. v2: - Fix commit message typo (Michał) - Add is_panel_type_pnp() (Ville) Reported-by: Martin Hodo <martin.hodo@intel.com> Fixes: 6434cf630086 ("drm/i915/bios: calculate panel type as per child device index in VBT") Cc: stable@vger.kernel.org # v6.0+ Cc: Animesh Manna <animesh.manna@intel.com> Cc: Ville Syrjälä <ville.syrjala@intel.com> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> # v1 Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260626140155.1389655-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com> (cherry picked from commit c9ebe5d2f25729d6cfbbb1235d640bf67f9275df) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2026-07-01drm/i915/vrr: require valid min/max vfreq for VRRJani Nikula
Ensure the EDID provided min/max vfreq are valid. Most scenarios are already covered (by coincidence) through the checks in intel_vrr_is_capable() and intel_vrr_is_in_range(), but be more explicit about it. At worst, a zero min_vfreq could lead to a division by zero in intel_vrr_compute_vmax(). Discovered using AI-assisted static analysis confirmed by Intel Product Security. Reported-by: Martin Hodo <martin.hodo@intel.com> Fixes: 117cd09ba528 ("drm/i915/display/dp: Compute VRR state in atomic_check") Cc: stable@vger.kernel.org # v5.12+ Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patch.msgid.link/20260625131040.1051272-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com> (cherry picked from commit 1765cf59f517b02f3b0591fe5120930d08bddeb6) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2026-06-30drm/panel-edp: Add BOE NE160QDM-NY1 panelDamon Ding
Add an entry for the BOE NE160QDM-NY1 eDP panel. The panel's AUX backlight functionality is verified and working on the RK3576 EVB1 board. edid-decode (hex): 00 ff ff ff ff ff ff 00 09 e5 85 09 00 00 00 00 1c 1e 01 04 b5 22 15 78 03 7c e5 a4 55 4c 9f 26 0f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 6b 6e 00 a0 a0 40 84 60 30 20 36 00 58 d7 10 00 00 1a 00 00 00 fd 0c 3c a5 1f 1f 4e 01 0a 20 20 20 20 20 20 00 00 00 fe 00 42 4f 45 20 43 51 0a 20 20 20 20 20 20 00 00 00 fe 00 4e 45 31 36 30 51 44 4d 2d 4e 59 31 0a 01 ed 02 03 1d 00 e3 05 80 00 e6 06 05 01 6a 6a 24 6d 1a 00 00 02 03 3c a5 00 04 6a 24 6a 24 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patch.msgid.link/20260625071916.744686-1-damon.ding@rock-chips.com
2026-06-30drm/xe/pf: Don't attempt to process FAST_REQ or EVENT relaysMichal Wajdeczko
Currently defined VF/PF relay actions use regular REQUEST messages only and the PF shouldn't attempt to handle FAST_REQUEST nor EVENT messages as this would result in breaking the VFPF ABI protocol and also might trigger an assert on the PF side. Fixes: 98e62805921c ("drm/xe/pf: Add SR-IOV GuC Relay PF services") Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Michał Winiarski <michal.winiarski@intel.com> Link: https://patch.msgid.link/20260527183735.22616-1-michal.wajdeczko@intel.com
2026-06-30drm/xe: Drop 'force_execlist' module parameterMatt Roper
During very early development of the Xe driver the force_execlist module parameter could be used to exercise some parts of the driver in a GuC-less manner. This was primarily intended to ensure that the driver was being designed and developed with proper modularity and layering; use of the GuC firmware has always been considered mandatory for any real Xe driver operation. The "execlist" implementation in the driver was never completed, and has further bitrotted over time to the point where it hangs during execution of even the simplest IGT tests like xe_exec_store now. Drop the force_execlist parameter; it's broken and isn't going to get fixed. In the (very unlikely) event that we decide to bring something like this back in the future, it would need to be as a per-device configfs setting rather than a driver-wide module parameter. The "execlist" implementation is now dead code, so it will probably also be removed sometime in the near future. There's a bit more general refactoring we might want to do first before we take that step, so for now we're just removing the module parameter. Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260626-remove_execlists-v1-1-2584d8c4a6f2@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-06-30drm/xe/tests/rtp: Add kunit test for whitelist upper boundsMatt Roper
Xe must only add registers to the GT whitelist if they are listed in the "Software Allowlist" section of the bspec. These registers have been carefully reviewed by the architecture/security teams to ensure that they are safe to whitelist from a security perspective. The list of allowed registers changes from platform to platform, and it is not safe to assume that a register is safe to whitelist on a new platform/IP just because it was whitelisted on older ones. This means that whitelist entries in the driver that used undefined upper bounds (XE_RTP_END_VERSION_UNDEFINED) for their version ranges should always be considered illegal since they could potentially open unexpected security holes on future platforms. Add a kunit test to scan the whitelist RTP table and ensure that all entries have well-defined upper bounds on IP version ranges. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20260626-kunit_whitelist_bounds-v3-1-aedf0b3adab9@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-06-30drm/panthor: Fix NPD issue on partial unmap of an evicted BOAkash Goel
This commit fixes the NULL pointer dereference issue that would have happened on the split of GPU mapping due to partial unmap of an evicted BO. There is a logic to handle the partial unmap of huge pages when the GPU mapping is split. That logic was not being completely skipped for the VMA of an evicted BO and that resulted in a NPD possibility for the 'bo->backing.pages' pointer, which is set to NULL when pages of a BO are released on eviction. Following dump was seen when a partial unmap was exercised for an evicted BO. Unable to handle kernel paging request at virtual address 0000000000002000 Mem abort info: ESR = 0x0000000096000004 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 FSC = 0x04: level 0 translation fault Data abort info: ISV = 0, ISS = 0x00000004, ISS2 = 0x00000000 CM = 0, WnR = 0, TnD = 0, TagAccess = 0 GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0 user pgtable: 4k pages, 48-bit VAs, pgdp=00000008842e8000 [0000000000002000] pgd=0000000000000000, p4d=0000000000000000 Internal error: Oops: 0000000096000004 [#1] SMP <snip> pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc : iova_mapped_as_huge_page+0x20/0x68 [panthor] lr : panthor_gpuva_sm_step_remap+0x39c/0x498 [panthor] sp : ffff800086193920 x29: ffff800086193920 x28: ffff800086193a18 x27: ffff800086193b80 x26: 0000000000400000 x25: 0000000000810000 x24: 0000000000400000 x23: ffff000808af1800 x22: 0000000000a00000 x21: ffff800086193a00 x20: ffff000806fd3f00 x19: 0000000000410000 x18: 00000000ffffffff x17: 0000000000000000 x16: 0000000000000000 x15: ffff800083ce2d83 x14: 0000000000000000 x13: 3120646574636976 x12: 6520303030303138 x11: 2d30303030313420 x10: ffff8000836e6c80 x9 : ffff80007bfc889c x8 : 3fffffffffffefff x7 : ffff8000836e6c80 x6 : 0000000000000000 x5 : ffff00097ef19088 x4 : 0000000000000000 x3 : 0000000000000000 x2 : 0000000000010000 x1 : 0000000000000400 x0 : 0000000000000000 Call trace: iova_mapped_as_huge_page+0x20/0x68 [panthor] (P) op_remap_cb.isra.0+0x70/0xb0 __drm_gpuvm_sm_unmap+0xf8/0x1c0 drm_gpuvm_sm_unmap+0x40/0x60 panthor_vm_exec_op+0xa0/0x168 [panthor] panthor_vm_bind_exec_sync_op+0x8c/0xb8 [panthor] panthor_ioctl_vm_bind+0xbc/0x170 [panthor] drm_ioctl_kernel+0xc0/0x140 drm_ioctl+0x20c/0x500 __arm64_sys_ioctl+0xb4/0x118 invoke_syscall+0x5c/0x120 el0_svc_common.constprop.0+0x48/0xf8 do_el0_svc+0x28/0x40 el0_svc+0x38/0x128 el0t_64_sync_handler+0xa0/0xe8 el0t_64_sync+0x198/0x1a0 Code: 8b030021 cb020021 f940b800 d34cfc21 (f8617801) ---[ end trace 0000000000000000 ]--- v2: Fix indentation Fixes: 8e7460eac786 ("drm/panthor: Support partial unmaps of huge pages") Signed-off-by: Akash Goel <akash.goel@arm.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://patch.msgid.link/20260623130119.2737003-1-akash.goel@arm.com Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2026-06-30drm/panthor: Keep interrupts masked until they are neededBoris Brezillon
The autogenerated panthor_request_xx_irq() helpers unmask Mali interrupts before we're sure we'll have a handler registered. For non-shared IRQ lines, that's fine, but for shared ones, it might cause an interrupt flood if the HW block raises an interrupt for any reason. We could reworking the calls in panthor_request_xx_irq(), but it's just simpler to let the caller decide when they are ready to handle interrupts and call panthor_pwr_irq_resume() themselves. While at it, rework the prototype to let users call panthor_pwr_irq_enable_events() explicitly instead of passing an initial mask to panthor_request_pwr_irq(). Fixes: 5fe909cae118 ("drm/panthor: Add the device logical block") Reported-by: Shashiko <sashiko-bot@kernel.org> Closes: https://sashiko.dev/#/patchset/20260623-panthor-signal-from-irq-v3-0-2ece396f8ee0@collabora.com?part=3 Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Karunika Choo <karunika.choo@arm.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://patch.msgid.link/20260625-panthor-misc-fixes-v1-11-b67ed973fea6@collabora.com