software/src/opensbi.git, branch master

lib: sbi_domain: Rename per-domain data to per-domain state

2026-09-05T07:23:15+00:00

The per-domain sbi_domain_data hold each domain associated state like hart context in sbi_domain_context, mpxy state in sbi_mpxy, and others like each domain backed by the corresponding MPT (SMMPT). DATA reads as a generic name, while every use stores state. Rename functions and macros appropriately. There are no functional changes. Signed-off-by: Rahul Pathak Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260820121309.2551296-3-rahul.pathak@oss.qualcomm.com Signed-off-by: Anup Patel

lib: sbi: Rename map_range/unmap_range functions

2026-09-05T07:22:39+00:00

*_map_range and *_unmap_range functions are required in M-Mode to get the temporary access to S-Mode and U-Mode regions. Thse functions only operate using the TYPE_MEMORY memory protection mechanisms. Rename them to reflect the actual usage of these functions and let generic map/unmap_range names to implement generic functions Signed-off-by: Rahul Pathak Reviewed-by: Anup Patel Reviewed-by: Pawandeep Oza Link: https://lore.kernel.org/r/20260820121309.2551296-2-rahul.pathak@oss.qualcomm.com Signed-off-by: Anup Patel

lib: sbi: Fix FP state enable in sbi_fp_save

2026-09-05T07:03:48+00:00

sbi_fp_save() currently sets mstatus.VS before executing floating-point store instructions. VS controls vector state and does not enable floating-point instructions. Set mstatus.FS instead, matching sbi_fp_restore(), so floating-point state can be saved when FS was previously Off. Fixes: 718e1d194f5a ("lib: sbi: Add floating-point context save/restore support.") Signed-off-by: whensun Co-developed-by: Huamao Wu Signed-off-by: Huamao Wu Link: https://lore.kernel.org/r/20260828213104.84490-1-theodoruswensanfebruanto025@gmail.com Signed-off-by: Anup Patel

lib: sbi_irqchip: error handling in sbi_irqchip_raw_handler_default()

2026-09-04T08:25:01+00:00

sbi_irqchip_find_handler() may return NULL. Check the return value before dereferencing. Addresses-Coverity-ID: 1677408 Dereference null return value Signed-off-by: Heinrich Schuchardt Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260820134431.167336-1-heinrich.schuchardt@canonical.com Signed-off-by: Anup Patel

lib: sbi: respect scounteren when emulating timeh

2026-09-04T08:14:57+00:00

beef2f693785 ("lib: sbi: Respect scounteren when emulating the time CSR") restored it for TIME only, so on RV32 supervisor software still cannot restrict U-mode or VS-mode access to time: rdtime traps as intended while rdtimeh keeps returning the upper half. Signed-off-by: Ben Zong-You Xie Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260805093354.1022980-1-ben717@andestech.com Signed-off-by: Anup Patel

lib: sbi_pmu: Fix counter and event info error codes as per SBI v3.0 spec

2026-09-04T06:13:53+00:00

Align the PMU extension implementation with the error codes required by the SBI v3.0 specification, chapter 11: - sbi_pmu_counter_start and sbi_pmu_counter_stop (secs 11.9-11.10, tables 39-42): the start_flags/stop_flags bits 2:(XLEN-1) are reserved and must be zero, so return SBI_ERR_INVALID_PARAM when any reserved flag bit is set. Introduce SBI_PMU_START_FLAGS_MASK and SBI_PMU_STOP_FLAGS_MASK for the valid bits of each function. - sbi_pmu_counter_start and sbi_pmu_counter_stop (tables 40 and 42): return SBI_ERR_ALREADY_STARTED / SBI_ERR_ALREADY_STOPPED when the set of counters includes a counter which is already started or stopped, instead of ignoring the error returned for each counter. - sbi_pmu_event_get_info (sec 11.14, table 47): the output word must indicate whether the event is supported, but firmware events were only matched against the hardware event map and were always reported as unsupported. Report a validated firmware event as supported. Signed-off-by: David E. Garcia Porras Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260818210023.466462-4-david.garcia@aheadcomputing.com Signed-off-by: Anup Patel

lib: sbi_pmu: Match raw event selector only against raw event map entries

2026-09-03T08:07:34+00:00

sbi_pmu_event_get_info() walks hw_event_map[] to decide whether a requested event is supported. For SBI_PMU_EVENT_RAW_IDX and SBI_PMU_EVENT_RAW_V2_IDX it compares the requested event_data against temp->select / temp->select_mask without first checking that the map entry being examined is itself a raw event entry. Non-raw hardware event entries are added via sbi_pmu_add_hw_event_counter_map(), leave select and select_mask at zero, hence they satisfy: temp->select == (event_data & temp->select_mask) so the first non-raw entry visited will always match. The issue's observability depends purely on the ordering of hw_event_map[]: if the platform registers its raw events last, every raw event query, including unsupported ones, will be reported as supported. Fix it by checking event_idx against temp->start_idx and temp->end_idx before comparing select/select_mask. Fixes: e4345842168b ("lib: sbi_pmu: Implement SBI PMU event info function") Signed-off-by: David E. Garcia Porras Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260818210023.466462-3-david.garcia@aheadcomputing.com Signed-off-by: Anup Patel

lib: sbi_pmu: Return invalid param error for reserved event_idx bits

2026-09-03T07:57:45+00:00

As per section 11.14 of the SBI specification (Function: Get PMU Event Info, FID #8), Table 47, the event_idx word of an event info entry only uses BIT[0:19]; BIT[20:31] are reserved for the future purpose and must be zero. Table 48 further requires the SBI implementation to return SBI_ERR_INVALID_PARAM if any reserved bit in an event_idx word is set. sbi_pmu_event_get_info() does not check the reserved bits, so a malformed event_idx is silently passed on to pmu_event_validate() instead of failing the call. Add SBI_PMU_EVENT_IDX_MBZ_MASK covering the must-be-zero bits and return SBI_ERR_INVALID_PARAM when any of them are set. Fixes: e4345842168b ("lib: sbi_pmu: Implement SBI PMU event info function") Signed-off-by: David E. Garcia Porras Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260818210023.466462-2-david.garcia@aheadcomputing.com Signed-off-by: Anup Patel

lib: sbi: sse: clear SPV for non-virtualized events

2026-09-01T07:27:33+00:00

SSE injection sets hstatus.SPV to the virtualization state of the interrupted context before entering the supervisor handler. This patch completes that existing requirement and does not change the SSE ABI. The existing code sets SPV when the interrupted context is virtualized, but leaves it unchanged otherwise. A stale SPV value can therefore make an event that interrupted host execution appear to have interrupted a guest. Event completion can then resume with virtualization enabled. Clear SPV when the interrupted context is not virtualized so the handler-visible state matches the interrupted context. This also lets supervisor software, such as the Linux PMU and perf code, reliably tell whether an SSE interrupted host or virtualized execution. Fixes: c8cdf01d8f3a ("lib: sbi: Add support for Supervisor Software Events extension") Signed-off-by: Zhanpeng Zhang Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260731071820.7318-1-zhangzhanpeng.jasper@bytedance.com Signed-off-by: Anup Patel

platform: generic/andes: fix 32-bit shift overflow in decode_pmaaddrx()

2026-09-01T05:29:55+00:00

decode_pmaaddrx() reconstructs the NAPOT region start and size from a pmaaddr CSR value using "1 << (k + 3)" and "1 << k". The integer literal 1 has type int, so these shifts are performed in 32-bit precision. Shifting a 32-bit value by 32 or more bits is undefined behavior, and on RV64 the compiler emits sllw, which truncates the shift amount modulo 32. As a result, any PMA region with size >= 4 GiB (k >= 29) is decoded incorrectly. For example, on the Andes QiLai SoC the PCIe region 0x1000000000 - 0x17ffffffff (pmaaddr = 0x4ffffffff, k = 32) is decoded as an 8-byte region at 0x13fffffffc. This is not merely cosmetic: decode_pmaaddrx() is used by has_pma_region_overlap() and andes_sbi_free_pma(), so overlap checks are performed against bogus ranges and freeing such an entry by its physical address always fails. Promote the shifts to unsigned long so they are performed in the native register width. Fixes: aa56084c4dfb ("platform: generic: andes: add a new Andes SBI call to set up a PMA entry") Signed-off-by: Randolph Lin Tested-by: Benoît Monin Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20260729092317.2848665-1-randolph@andestech.com Signed-off-by: Anup Patel