<feed xmlns='http://www.w3.org/2005/Atom'>
<title>qemu/qemu.git/linux-user/mips64, branch master</title>
<subtitle>QEMU main repository</subtitle>
<id>https://git.landau.one/pub/scm/virt/qemu/qemu.git/atom?h=master</id>
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<updated>2026-08-07T16:14:13+00:00</updated>
<entry>
<title>linux-user/mips: write the floating-point registers to a core dump</title>
<updated>2026-08-07T16:14:13+00:00</updated>
<author>
<name>Matt Turner</name>
<email>mattst88@gmail.com</email>
</author>
<published>2026-08-05T17:15:04+00:00</published>
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<id>urn:sha1:bc22871fc0146f3cf6f4bbef9b6cdef16d1643f5</id>
<content type='text'>
Write an NT_FPREGSET note for MIPS and MIPS64, matching the kernel's
elf_fpregset_t layout (ELF_NFPREG = 33): fpr[0..31] hold f0-f31, and
fcsr occupies the low 32 bits of slot 32.  The pad field rounds the
struct to 33 × 8 bytes = 264 bytes.

Signed-off-by: Matt Turner &lt;mattst88@gmail.com&gt;
Reviewed-by: Helge Deller &lt;deller@gmx.de&gt;
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>linux-user/mips64: fix mipsn32 elf_core_copy_regs entry width</title>
<updated>2026-05-24T13:07:28+00:00</updated>
<author>
<name>Matt Turner</name>
<email>mattst88@gmail.com</email>
</author>
<published>2026-05-21T18:41:02+00:00</published>
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<id>urn:sha1:6033df08e93df313771b6637230de2d66bdc09cb</id>
<content type='text'>
For mipsn32 (TARGET_ABI32=y, TARGET_LONG_BITS=64):
  abi_ulong = uint32_t (4 bytes) — for pointers and ABI-sized fields
  target_ulong = uint64_t (8 bytes) — for general-purpose registers

linux-user/elfload.c allocates target_elf_prstatus using the
mips64/target_elf.h definition where target_elf_gregset_t has
target_ulong reserved[45] (8 bytes each, 360 bytes total).

However, in linux-user/mips64/elfload.c, #include "target_elf.h" inside
the included mips/elfload.c resolves to mips/target_elf.h (compiler
searches the file's own directory first), where the union uses abi_ulong
reserved[45].  For mipsn32 this gives 4-byte entries (180 bytes), not
the 8-byte entries (360 bytes) that elfload.c actually allocated.

Writing via r-&gt;reserved[34] therefore lands at byte offset 34*4=136
instead of the correct 34*8=272, silently zeroing the EPC in the core
file.

Fix by casting the pointer to target_ulong * so writes always use 8-byte
slots and land at the offsets matching the allocated layout.

This does not change behavior for mips64 (N64) where abi_ulong already
equals target_ulong (both 8 bytes).

Signed-off-by: Matt Turner &lt;mattst88@gmail.com&gt;
Cc: qemu-stable@nongnu.org
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>linux-user/mips64: fix elf_core_copy_regs register layout in core files</title>
<updated>2026-05-24T13:07:28+00:00</updated>
<author>
<name>Matt Turner</name>
<email>mattst88@gmail.com</email>
</author>
<published>2026-05-21T18:41:01+00:00</published>
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<id>urn:sha1:dd3a906d3505561d9cb3367b82c5475acca50b6b</id>
<content type='text'>
mips64/elfload.c uses #include "../mips/elfload.c" to share code. When
the compiler processes mips/elfload.c the quoted #include "target_elf.h"
resolves relative to the including file's directory, so it picks up
mips/target_elf.h instead of mips64/target_elf.h.  mips/target_elf.h
pulls in mips/target_ptrace.h, whose target_pt_regs has a pad0[6] field
before regs[].  As a result elf_core_copy_regs writes:

  r-&gt;pt.regs[i]   -&gt; reserved[6+i]   (shifted by 6 from the correct index)
  r-&gt;pt.cp0_epc   -&gt; reserved[40]    (correct mips64 N64 index is 34)

The Linux kernel and glibc both use the mips64 N64 layout (no pad0): EPC
at reserved[34].  Debuggers and libunwind reading the core with N64
constants therefore see a completely wrong register set — EPC points to
GP, RA holds the branch target instead of the link address, etc.

Fix by:
 - Guarding the mips32 elf_core_copy_regs in mips/elfload.c with #ifndef
   TARGET_MIPS64 so it is not compiled for mips64/mipsn32 targets.
 - Providing a mips64-specific elf_core_copy_regs in mips64/elfload.c
   that writes directly to r-&gt;reserved[i] with the correct N64 indices,
   bypassing the struct field names that are tainted by the wrong header
   include.

The mipsn32 (TARGET_ABI_MIPSN32) and mips64el targets are covered by the
same mips64/elfload.c and benefit from the same fix.

Signed-off-by: Matt Turner &lt;mattst88@gmail.com&gt;
Cc: qemu-stable@nongnu.org
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>linux-user/mips, target/mips: honor MIPS_FIXADE for unaligned accesses</title>
<updated>2026-05-21T06:20:58+00:00</updated>
<author>
<name>James Hilliard</name>
<email>james.hilliard1@gmail.com</email>
</author>
<published>2026-04-08T18:54:28+00:00</published>
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<id>urn:sha1:bd8820aa7b0b8c03441feeaa790047f6028dbc38</id>
<content type='text'>
Linux/MIPS enables software fixups for user-mode unaligned scalar
accesses by default through MIPS_FIXADE/TIF_FIXADE.  QEMU linux-user did
not model that ABI, so MIPS guests took fatal AdEL/AdES exceptions unless
translation was forced to use unaligned host accesses.

Key MIPS translation blocks on the linux-user unaligned policy, implement
sysmips(MIPS_FIXADE) to toggle that policy, and raise SIGBUS/BUS_ADRALN
when fixups are disabled.

Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: James Hilliard &lt;james.hilliard1@gmail.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Message-Id: &lt;20260520172313.23777-4-philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>linux-user/mips: implement sysmips(MIPS_ATOMIC_SET)</title>
<updated>2026-05-21T06:20:58+00:00</updated>
<author>
<name>James Hilliard</name>
<email>james.hilliard1@gmail.com</email>
</author>
<published>2026-05-08T07:14:05+00:00</published>
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<id>urn:sha1:5c6f4d7054c233dc45f636c6e4dea73a80ca0d78</id>
<content type='text'>
Implement the MIPS_ATOMIC_SET sysmips command as an aligned 32-bit atomic
exchange in target memory.

MIPS reports syscall errors through a separate register, so successful old
values can overlap the errno range.  Write the return value and error flag
directly and return -QEMU_ESIGRETURN so the common syscall path leaves the
registers unchanged.

Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: James Hilliard &lt;james.hilliard1@gmail.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Message-Id: &lt;20260520172313.23777-3-philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>linux-user/mips: implement sysmips(MIPS_FLUSH_CACHE)</title>
<updated>2026-05-21T06:20:58+00:00</updated>
<author>
<name>James Hilliard</name>
<email>james.hilliard1@gmail.com</email>
</author>
<published>2026-05-08T07:13:45+00:00</published>
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<id>urn:sha1:e83a42cbf72bf83eabb71d85be88df34c953b158</id>
<content type='text'>
Add the target sysmips dispatcher and implement MIPS_FLUSH_CACHE as a
successful no-op for linux-user.

Self-modifying code is handled by QEMU's normal user-mode translation
invalidation machinery, so the target ABI only needs the syscall command
to be accepted.

Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: James Hilliard &lt;james.hilliard1@gmail.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Message-Id: &lt;20260520172313.23777-2-philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>linux-user: Standardize on ELF_MACHINE not ELF_ARCH</title>
<updated>2025-08-29T21:04:04+00:00</updated>
<author>
<name>Richard Henderson</name>
<email>richard.henderson@linaro.org</email>
</author>
<published>2025-07-29T21:23:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/virt/qemu/qemu.git/commit/?id=e6b7635c9a33918c671e1f2ef4b17b5c2f279d66'/>
<id>urn:sha1:e6b7635c9a33918c671e1f2ef4b17b5c2f279d66</id>
<content type='text'>
PowerPC was the one outlier that defined both ELF_ARCH and
ELF_MACHINE; ELF_ARCH was defined incorrectly, necessitating
the definition of elf_check_arch.

However, the elf file header field in question is called
e_machine, so ELF_MACHINE is in fact the better name.

Mechanically change most target/target_elf.h files,
then adjust ppc/target_elf.h manually.

Do not provide a default for ELF_MACHINE.

Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>linux-user: Move elf parameters to {mips,mips64}/target_elf.h</title>
<updated>2025-08-29T21:04:04+00:00</updated>
<author>
<name>Richard Henderson</name>
<email>richard.henderson@linaro.org</email>
</author>
<published>2025-07-29T20:30:44+00:00</published>
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<id>urn:sha1:c33d6652970edcdc6d88e1e4316569f618086a9a</id>
<content type='text'>
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>linux-user/mips: Use target_ulong for target_elf_greg_t</title>
<updated>2025-08-29T21:04:04+00:00</updated>
<author>
<name>Richard Henderson</name>
<email>richard.henderson@linaro.org</email>
</author>
<published>2025-08-28T02:05:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.landau.one/pub/scm/virt/qemu/qemu.git/commit/?id=c61b88fbe49e428e39eff501cddbcd53f12486cb'/>
<id>urn:sha1:c61b88fbe49e428e39eff501cddbcd53f12486cb</id>
<content type='text'>
Make use of the fact that target_elf_gregset_t is a proper structure.
The target_ulong type matches the abi_ulong/abi_ullong
selection within mips64/target_elf.h.

Drop ELF_NREG, target_elf_greg_t, and tswapreg.

Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>linux-user/mips: Create target_ptrace.h</title>
<updated>2025-08-29T21:04:04+00:00</updated>
<author>
<name>Richard Henderson</name>
<email>richard.henderson@linaro.org</email>
</author>
<published>2025-08-28T05:34:41+00:00</published>
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<id>urn:sha1:0dcef5773000f4d72277c6b41200f35031bdcbb5</id>
<content type='text'>
Move the target_pt_regs structure from target_syscall.h.
Fix the incorrect ordering of the fields.

Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
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