diff options
| author | Christian S. Lima <christianslima@proton.me> | 2026-08-08 03:18:54 +0000 |
|---|---|---|
| committer | Michael Tokarev <mjt@tls.msk.ru> | 2026-08-25 14:11:14 +0300 |
| commit | da39104d0e0506e86b885a92560e8d2fe6437af3 (patch) | |
| tree | 115c08d018cb21d33f6c7e4eba777f4faaded7a0 | |
| parent | 6ed2e04412a0122bb30e1d74135c57de90d59dd9 (diff) | |
| download | qemu-da39104d0e0506e86b885a92560e8d2fe6437af3.tar.gz qemu-da39104d0e0506e86b885a92560e8d2fe6437af3.zip | |
target/riscv/tcg: sret in virtual user mode raises virtual instruction exception
Currently, when a `sret` is executed in virtual user mode, qemu
raise an `illegal instruction exception`, but in this case the correct
behavior is to raise a `virtual instruction exception` and the code
already contains a check to it, but it's not enough to catch. This
patch is useful to improve the correctness of the virtualization of
the risc v architecture.
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3622
Signed-off-by: Christian S. Lima <christianslima@proton.me>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20260808031849.59726-1-christianslima@proton.me>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
(cherry picked from commit 85d38315fd19cda7fcfec5350f27cdfa15742600)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| -rw-r--r-- | target/riscv/op_helper.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index c5dc18a27b..8b2ae3a0c7 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -297,6 +297,11 @@ target_ulong helper_sret(CPURISCVState *env) const target_ulong src_priv = env->priv; const bool src_virt = env->virt_enabled; + if ((env->virt_enabled && env->priv < PRV_S) || + (env->virt_enabled && get_field(env->hstatus, HSTATUS_VTSR))) { + riscv_raise_exception(env, RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETPC()); + } + if (!(env->priv >= PRV_S)) { riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); } @@ -312,10 +317,6 @@ target_ulong helper_sret(CPURISCVState *env) riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); } - if (env->virt_enabled && get_field(env->hstatus, HSTATUS_VTSR)) { - riscv_raise_exception(env, RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETPC()); - } - mstatus = env->mstatus; prev_priv = get_field(mstatus, MSTATUS_SPP); mstatus = set_field(mstatus, MSTATUS_SIE, |
