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| author | Richard Henderson <richard.henderson@linaro.org> | 2026-08-12 15:31:28 -0700 |
|---|---|---|
| committer | Michael Tokarev <mjt@tls.msk.ru> | 2026-08-25 10:27:16 +0300 |
| commit | db79e3b031f4c6185962f0fa42d10c6148fde3e1 (patch) | |
| tree | 62858747c6c9bd694edefd61073d1641fd10a501 | |
| parent | 6b736980a75ef7f31ccc3cd15baf52bfb618c554 (diff) | |
| download | qemu-db79e3b031f4c6185962f0fa42d10c6148fde3e1.tar.gz qemu-db79e3b031f4c6185962f0fa42d10c6148fde3e1.zip | |
disas/riscv: Fix rv32 encoding of zext.h
For rv64, pack with rs2 = 0 does not encode zext.h.
Cc: qemu-stable@nongnu.org
Fixes: 02c1b569a15 ("disas/riscv: Add Zb[abcs] instructions")
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260812223142.349142-39-richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
(cherry picked from commit d4151cf2675124e26b3383ae06f7352a23f17399)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| -rw-r--r-- | disas/riscv.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/disas/riscv.c b/disas/riscv.c index 024b504405..43b86c5ab5 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -3182,9 +3182,10 @@ static void decode_inst_opcode(rv_decode *dec, rv_isa isa) case 14: op = rv_op_rem; break; case 15: op = rv_op_remu; break; case 36: - switch ((inst >> 20) & 0b11111) { - case 0: op = rv_op_zext_h; break; - default: op = rv_op_pack; break; + if (isa == rv32 && !((inst >> 20) & 0b11111)) { + op = rv_op_zext_h; + } else { + op = rv_op_pack; } break; case 39: op = rv_op_packh; break; |