summaryrefslogtreecommitdiff
path: root/target/hexagon/gen_tcg.h
diff options
context:
space:
mode:
Diffstat (limited to 'target/hexagon/gen_tcg.h')
-rw-r--r--target/hexagon/gen_tcg.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h
index 1d25391282..5f7df66ae6 100644
--- a/target/hexagon/gen_tcg.h
+++ b/target/hexagon/gen_tcg.h
@@ -1329,6 +1329,34 @@
do { } while (0)
#define fGEN_TCG_Y2_syncht(SHORTCODE) \
do { } while (0)
+
+#define fGEN_TCG_DMA_UNIMP() \
+ qemu_log_mask(LOG_UNIMP, "'%s' is not implemented\n", \
+ opcode_names[insn->opcode])
+#define fGEN_TCG_Y6_dmstart(SHORTCODE) \
+ do { fGEN_TCG_DMA_UNIMP(); RsV = RsV; } while (0)
+#define fGEN_TCG_Y6_dmresume(SHORTCODE) \
+ do { fGEN_TCG_DMA_UNIMP(); RsV = RsV; } while (0)
+#define fGEN_TCG_Y6_dmlink(SHORTCODE) \
+ do { fGEN_TCG_DMA_UNIMP(); RsV = RsV; RtV = RtV; } while (0)
+#define fGEN_TCG_Y6_dmcfgwr(SHORTCODE) \
+ do { fGEN_TCG_DMA_UNIMP(); RsV = RsV; RtV = RtV; } while (0)
+#define fGEN_TCG_Y6_dmcfgrd(SHORTCODE) \
+ do { \
+ fGEN_TCG_DMA_UNIMP(); \
+ RsV = RsV; \
+ tcg_gen_movi_tl(RdV, 0); \
+ } while (0)
+#define fGEN_TCG_Y6_dmpoll(SHORTCODE) \
+ do { fGEN_TCG_DMA_UNIMP(); tcg_gen_movi_tl(RdV, 0); } while (0)
+#define fGEN_TCG_Y6_dmwait(SHORTCODE) \
+ do { fGEN_TCG_DMA_UNIMP(); tcg_gen_movi_tl(RdV, 0); } while (0)
+#define fGEN_TCG_Y6_dmpause(SHORTCODE) \
+ do { fGEN_TCG_DMA_UNIMP(); tcg_gen_movi_tl(RdV, 0); } while (0)
+#define fGEN_TCG_Y6_dmsyncht(SHORTCODE) \
+ do { fGEN_TCG_DMA_UNIMP(); tcg_gen_movi_tl(RdV, 0); } while (0)
+#define fGEN_TCG_Y6_dmtlbsynch(SHORTCODE) \
+ do { fGEN_TCG_DMA_UNIMP(); tcg_gen_movi_tl(RdV, 0); } while (0)
#define fGEN_TCG_Y2_dcfetchbo(SHORTCODE) \
do { \
RsV = RsV; \