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| author | chrtob01 <chris.tobing@arm.com> | 2024-10-09 15:08:32 +0000 |
|---|---|---|
| committer | Ryan Everett <ryan.everett@arm.com> | 2026-01-27 15:15:05 +0000 |
| commit | c8b882fd472f2e64d583ead0c3507c1ec543fd48 (patch) | |
| tree | 21f5566193ba6c7d7eb4fcfc61e3895b82c5ff3b /fdts | |
| parent | b79eb3ef1e27bcd275806991bb4db847d3bea7eb (diff) | |
| download | arm-trusted-firmware-c8b882fd472f2e64d583ead0c3507c1ec543fd48.tar.gz arm-trusted-firmware-c8b882fd472f2e64d583ead0c3507c1ec543fd48.zip | |
refactor(tc): update PD indices to reflect new domain view
Make the OSPM view the GPU as a single power domain.
Change-Id: I55a25a8bdfa85a90c760a1ff716f6c33749e6859
Signed-off-by: Chris Tobing <chris.tobing@arm.com>
Signed-off-by: Ryan Everett <ryan.everett@arm.com>
Diffstat (limited to 'fdts')
| -rw-r--r-- | fdts/tc-base.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/fdts/tc-base.dtsi b/fdts/tc-base.dtsi index cf9253000..cca0995eb 100644 --- a/fdts/tc-base.dtsi +++ b/fdts/tc-base.dtsi @@ -17,6 +17,12 @@ #define MHU_RX_INT_NUM 300 #define MHU_RX_INT_NAME "combined" +/* If SCMI power domain control is enabled */ +#if TC_SCMI_PD_CTRL_EN +#define GPU_SCMI_PD_IDX 0 +#endif /* TC_SCMI_PD_CTRL_EN */ + + #define DSU_MPAM_ADDR 0x0 0x5f010000 /* 0x5f01_0000 */ #if TARGET_FLAVOUR_FVP @@ -24,12 +30,6 @@ #define DPU_IRQ 579 #endif -/* If SCMI power domain control is enabled */ -#if TC_SCMI_PD_CTRL_EN -#define GPU_SCMI_PD_IDX (PLAT_MAX_CPUS_PER_CLUSTER + 1) -#define DPU_SCMI_PD_IDX (PLAT_MAX_CPUS_PER_CLUSTER + 2) -#endif /* TC_SCMI_PD_CTRL_EN */ - /* Use SCMI controlled clocks */ #if TC_DPU_USE_SCMI_CLK #define DPU_CLK_ATTR1 \ |