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| author | Manish Pandey <manish.pandey2@arm.com> | 2026-01-09 15:51:16 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2026-01-09 15:51:16 +0000 |
| commit | f22cc37970f9471e67ac38026419b6764486cd40 (patch) | |
| tree | e51539a461ebbb2567e428d6fb97499d41b0cc81 /fdts | |
| parent | 048cb1dd5ddd487561b4b5ac89b8f795d6115da7 (diff) | |
| parent | 75ecfa7895e4ca6e7ba6694e5cb8abfab619e675 (diff) | |
| download | arm-trusted-firmware-f22cc37970f9471e67ac38026419b6764486cd40.tar.gz arm-trusted-firmware-f22cc37970f9471e67ac38026419b6764486cd40.zip | |
Merge "fix(rdaspen): dts: make cache nodes DT spec compliant" into integration
Diffstat (limited to 'fdts')
| -rw-r--r-- | fdts/rdaspen-defs.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/fdts/rdaspen-defs.dtsi b/fdts/rdaspen-defs.dtsi index 7ccbd8bc8..0fa86a087 100644 --- a/fdts/rdaspen-defs.dtsi +++ b/fdts/rdaspen-defs.dtsi @@ -22,7 +22,7 @@ d-cache-line-size = <0x40>; \ d-cache-sets = <0x100>; \ next-level-cache = <&CL##cluster_num##_L2_##cluster_core_num>; \ - CL##cluster_num##_L2_##cluster_core_num: l2-cache##cpu_num { \ + CL##cluster_num##_L2_##cluster_core_num: l2-cache { \ compatible = "cache"; \ cache-unified; \ cache-level = <0x02>; \ @@ -43,7 +43,8 @@ #define CLUSTER_L3_CACHE(cluster_num) \ CL##cluster_num##_L3: l3-cache##cluster_num## { \ - compatible = "arm,dsu-l3-cache", "cache"; \ + compatible = "cache"; \ + cache-unified; \ cache-level = <0x03>; \ /* 4MB */ \ cache-size = <0x400000>; \ |