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| author | John Powell <john.powell@arm.com> | 2026-06-15 21:50:51 -0500 |
|---|---|---|
| committer | John Powell <john.powell@arm.com> | 2026-07-30 20:14:25 +0000 |
| commit | f907a23122b0affbc1621022df4676369863594c (patch) | |
| tree | 4ffc3da9881762bd9635350a2b1ac60bb9764c76 /include | |
| parent | 994af9e0606a3f5f225bd8c75d5bc9264668fd0c (diff) | |
| download | arm-trusted-firmware-f907a23122b0affbc1621022df4676369863594c.tar.gz arm-trusted-firmware-f907a23122b0affbc1621022df4676369863594c.zip | |
fix(cpus): correct definition for CPUECTLR_EL1 on LSC25 E Core
The register mapping is incorrect for this register on LSC25 E Core,
This patch corrects it.
Change-Id: Ic6c25ed44fca81ee181897a0f72ebab93da59816
Signed-off-by: John Powell <john.powell@arm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/lib/cpus/aarch64/lsc25_e_core.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/lib/cpus/aarch64/lsc25_e_core.h b/include/lib/cpus/aarch64/lsc25_e_core.h index baf333174..5ab4d1be3 100644 --- a/include/lib/cpus/aarch64/lsc25_e_core.h +++ b/include/lib/cpus/aarch64/lsc25_e_core.h @@ -14,7 +14,7 @@ /******************************************************************************* * CPU Extended Control register specific definitions ******************************************************************************/ -#define LSC25_E_CORE_IMP_CPUECTLR_EL1 S3_0_C15_C1_5 +#define LSC25_E_CORE_IMP_CPUECTLR_EL1 S3_0_C15_C1_4 /******************************************************************************* * CPU Power Control register specific definitions |