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-rw-r--r--drivers/delay_timer/generic_delay_timer.c4
-rw-r--r--include/arch/aarch32/arch_features.h11
-rw-r--r--include/arch/aarch64/arch_features.h6
-rw-r--r--lib/el3_runtime/aarch32/context_mgmt.c2
-rw-r--r--lib/extensions/sme/sme.c4
-rw-r--r--lib/gpt_rme/gpt_rme.c4
-rw-r--r--lib/xlat_tables/aarch64/xlat_tables.c2
-rw-r--r--lib/xlat_tables_v2/aarch32/xlat_tables_arch.c4
-rw-r--r--lib/xlat_tables_v2/aarch64/xlat_tables_arch.c10
-rw-r--r--plat/qemu/common/qemu_bl31_setup.c9
-rw-r--r--services/arm_arch_svc/arm_arch_svc_setup.c4
-rw-r--r--services/std_svc/rmmd/rmmd_main.c3
12 files changed, 31 insertions, 32 deletions
diff --git a/drivers/delay_timer/generic_delay_timer.c b/drivers/delay_timer/generic_delay_timer.c
index 0407e3859..f8c224c2a 100644
--- a/drivers/delay_timer/generic_delay_timer.c
+++ b/drivers/delay_timer/generic_delay_timer.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2026, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -64,7 +64,7 @@ void generic_delay_timer_init_args(uint32_t mult, uint32_t div)
void generic_delay_timer_init(void)
{
- assert(is_armv7_gentimer_present());
+ assert(is_armv7_gentimer_supported());
/* Value in ticks */
unsigned int mult = MHZ_TICKS_PER_SEC;
diff --git a/include/arch/aarch32/arch_features.h b/include/arch/aarch32/arch_features.h
index 8a926297c..fe692d185 100644
--- a/include/arch/aarch32/arch_features.h
+++ b/include/arch/aarch32/arch_features.h
@@ -23,12 +23,13 @@
CREATE_FEATURE_SUPPORTED(name, idreg, field, min, guard)
__attribute__((always_inline))
-static inline bool is_armv7_gentimer_present(void)
+static inline bool is_armv7_gentimer_supported(void)
{
return EXTRACT(ID_PFR1_GENTIMER, read_id_pfr1()) != 0U;
}
-CREATE_FEATURE_PRESENT(feat_ttcnp, id_mmfr4, ID_MMFR4_CNP, 1U)
+CREATE_FEATURE_FUNCS(feat_ttcnp, id_mmfr4, ID_MMFR4_CNP,
+ 1U, FEAT_STATE_CHECKED)
CREATE_FEATURE_FUNCS(feat_amu, id_pfr0, ID_PFR0_AMU,
ID_PFR0_AMU_V1, ENABLE_FEAT_AMU)
@@ -51,9 +52,11 @@ CREATE_FEATURE_FUNCS(feat_dit, id_pfr0, ID_PFR0_DIT,
CREATE_FEATURE_FUNCS(feat_pan, id_mmfr3, ID_MMFR3_PAN,
1U, ENABLE_FEAT_PAN)
-CREATE_FEATURE_PRESENT(feat_ssbs, id_pfr2, ID_PFR2_SSBS, 1U)
+CREATE_FEATURE_FUNCS(feat_ssbs, id_pfr2, ID_PFR2_SSBS,
+ 1U, FEAT_STATE_CHECKED)
-CREATE_FEATURE_PRESENT(feat_pmuv3, id_dfr0, ID_DFR0_PERFMON, 3U)
+CREATE_FEATURE_FUNCS(feat_pmuv3, id_dfr0, ID_DFR0_PERFMON,
+ 3U, FEAT_STATE_CHECKED)
CREATE_FEATURE_FUNCS(feat_mtpmu, id_dfr1, ID_DFR1_MTPMU,
1U, DISABLE_MTPMU)
diff --git a/include/arch/aarch64/arch_features.h b/include/arch/aarch64/arch_features.h
index 540392fc3..cf4ea87fd 100644
--- a/include/arch/aarch64/arch_features.h
+++ b/include/arch/aarch64/arch_features.h
@@ -635,7 +635,7 @@ FEAT_MPAM_PE_BW_CTRL(CREATE_FEATURE_FUNCS)
* Non-standard, not directly architectural helpers
******************************************************************************/
__attribute__((always_inline))
-static inline bool is_armv7_gentimer_present(void)
+static inline bool is_armv7_gentimer_supported(void)
{
/* The Generic Timer is always present in an ARMv8-A implementation */
return true;
@@ -660,7 +660,7 @@ static inline bool is_feat_crypto_supported(void)
}
__attribute__((always_inline))
-static inline bool is_feat_tgran4K_present(void)
+static inline bool is_feat_tgran4K_supported(void)
{
unsigned int tgranx = (unsigned int)EXTRACT(ID_AA64MMFR0_EL1_TGRAN4,
read_id_aa64mmfr0_el1());
@@ -668,7 +668,7 @@ static inline bool is_feat_tgran4K_present(void)
}
__attribute__((always_inline))
-static inline bool is_feat_tgran64K_present(void)
+static inline bool is_feat_tgran64K_supported(void)
{
unsigned int tgranx = (unsigned int)EXTRACT(ID_AA64MMFR0_EL1_TGRAN64,
read_id_aa64mmfr0_el1());
diff --git a/lib/el3_runtime/aarch32/context_mgmt.c b/lib/el3_runtime/aarch32/context_mgmt.c
index 942f7d2dd..5b3ae40e0 100644
--- a/lib/el3_runtime/aarch32/context_mgmt.c
+++ b/lib/el3_runtime/aarch32/context_mgmt.c
@@ -149,7 +149,7 @@ static void enable_extensions_nonsecure(bool el2_unused)
trf_init_el3();
}
- if (is_feat_pmuv3_present()) {
+ if (is_feat_pmuv3_supported()) {
pmuv3_init_el3();
}
#endif /* IMAGE_BL32 */
diff --git a/lib/extensions/sme/sme.c b/lib/extensions/sme/sme.c
index bd5ad319f..2c77d02a9 100644
--- a/lib/extensions/sme/sme.c
+++ b/lib/extensions/sme/sme.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021-2025, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2021-2026, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -48,7 +48,7 @@ void sme_init_el3(void)
* using SMCR_EL2 and SMCR_EL1.
*/
smcr_el3 = SMCR_ELX_LEN_MAX;
- if (is_feat_sme_fa64_present()) {
+ if (is_feat_sme_fa64_supported()) {
VERBOSE("[SME] FA64 enabled\n");
smcr_el3 |= SMCR_ELX_FA64_BIT;
}
diff --git a/lib/gpt_rme/gpt_rme.c b/lib/gpt_rme/gpt_rme.c
index b887497cb..561877491 100644
--- a/lib/gpt_rme/gpt_rme.c
+++ b/lib/gpt_rme/gpt_rme.c
@@ -337,7 +337,7 @@ static bool is_gpi_valid(unsigned int gpi)
case GPT_GPI_ANY:
return true;
case GPT_GPI_NSO:
- return is_feat_rme_gpc2_present();
+ return is_feat_rme_gpc2_supported();
case GPT_GPI_SA:
case GPT_GPI_NSP:
return is_feat_rme_gdi_supported();
@@ -1156,7 +1156,7 @@ int gpt_enable(void)
gpccr_el3 |= GPCCR_GPC_BIT;
/* Enable NSO encoding if FEAT_RME_GPC2 is supported. */
- if (is_feat_rme_gpc2_present()) {
+ if (is_feat_rme_gpc2_supported()) {
gpccr_el3 |= GPCCR_NSO_BIT;
/* Enable NSO in NS transition policies. */
diff --git a/lib/xlat_tables/aarch64/xlat_tables.c b/lib/xlat_tables/aarch64/xlat_tables.c
index 36cfbd313..0fe653f6e 100644
--- a/lib/xlat_tables/aarch64/xlat_tables.c
+++ b/lib/xlat_tables/aarch64/xlat_tables.c
@@ -86,7 +86,7 @@ static uintptr_t xlat_get_min_virt_addr_space_size(void)
{
uintptr_t ret;
- if (is_feat_ttst_present())
+ if (is_feat_ttst_supported())
ret = MIN_VIRT_ADDR_SPACE_SIZE_TTST;
else
ret = MIN_VIRT_ADDR_SPACE_SIZE;
diff --git a/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c
index 6817b504a..ff73a88a2 100644
--- a/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c
+++ b/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2026, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -250,7 +250,7 @@ void setup_mmu_cfg(uint64_t *params, unsigned int flags,
/* Set TTBR0 bits as well */
ttbr0 = (uint64_t)(uintptr_t) base_table;
- if (is_feat_ttcnp_present()) {
+ if (is_feat_ttcnp_supported()) {
/* Enable CnP bit so as to share page tables with all PEs. */
ttbr0 |= TTBR_CNP_BIT;
}
diff --git a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
index 08c89b65d..4539b0292 100644
--- a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
+++ b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
@@ -25,12 +25,12 @@ bool xlat_arch_is_granule_size_supported(size_t size)
{
if (size == PAGE_SIZE_4KB) {
/* MSB of TGRAN4 field will be '1' for unsupported feature */
- return is_feat_tgran4K_present();
+ return is_feat_tgran4K_supported();
} else if (size == PAGE_SIZE_16KB) {
- return is_feat_tgran16K_present();
+ return is_feat_tgran16K_supported();
} else if (size == PAGE_SIZE_64KB) {
/* MSB of TGRAN64 field will be '1' for unsupported feature */
- return is_feat_tgran64K_present();
+ return is_feat_tgran64K_supported();
} else {
return false;
}
@@ -181,7 +181,7 @@ uintptr_t xlat_get_min_virt_addr_space_size(void)
{
uintptr_t ret;
- if (is_feat_ttst_present())
+ if (is_feat_ttst_supported())
ret = MIN_VIRT_ADDR_SPACE_SIZE_TTST;
else
ret = MIN_VIRT_ADDR_SPACE_SIZE;
@@ -371,7 +371,7 @@ void setup_mmu_cfg(uint64_t *params, unsigned int flags,
/* Set TTBR bits as well */
ttbr0 = (uint64_t) base_table;
- if (is_feat_ttcnp_present()) {
+ if (is_feat_ttcnp_supported()) {
/* Enable CnP bit so as to share page tables with all PEs. */
ttbr0 |= TTBR_CNP_BIT;
}
diff --git a/plat/qemu/common/qemu_bl31_setup.c b/plat/qemu/common/qemu_bl31_setup.c
index 6480233b4..bbbab5486 100644
--- a/plat/qemu/common/qemu_bl31_setup.c
+++ b/plat/qemu/common/qemu_bl31_setup.c
@@ -233,9 +233,11 @@ static void bl31_adjust_pas_regions(void)
pas_regions[3].size = total_size;
}
#endif /* PLAT_qemu */
+#endif /* ENABLE_FEAT_RME */
static void bl31_plat_gpt_setup(void)
{
+#if ENABLE_FEAT_RME
/*
* Initialize entire protected space to GPT_GPI_ANY. With each L0 entry
* covering 1GB (currently the only supported option), then covering
@@ -266,8 +268,8 @@ static void bl31_plat_gpt_setup(void)
ERROR("gpt_enable() failed!\n");
panic();
}
-}
#endif /* ENABLE_FEAT_RME */
+}
void bl31_plat_arch_setup(void)
{
@@ -300,10 +302,7 @@ void bl31_plat_arch_setup(void)
* check done using is_feat_rme_supported(). So calls to gpt library
* are gated using ENABLE_FEAT_RME.
*/
-#if ENABLE_FEAT_RME
if (is_feat_rme_supported()) {
- assert(is_feat_rme_present());
-
bl31_plat_gpt_setup();
/*
@@ -317,8 +316,6 @@ void bl31_plat_arch_setup(void)
panic();
}
}
-#endif /* ENABLE_FEAT_RME */
-
}
static void qemu_gpio_init(void)
diff --git a/services/arm_arch_svc/arm_arch_svc_setup.c b/services/arm_arch_svc/arm_arch_svc_setup.c
index 27d13ee28..320f24c6e 100644
--- a/services/arm_arch_svc/arm_arch_svc_setup.c
+++ b/services/arm_arch_svc/arm_arch_svc_setup.c
@@ -57,7 +57,7 @@ static int32_t smccc_arch_features(u_register_t arg1)
* PE implements architectural Speculation Store Bypass Safe
* (SSBS) feature.
*/
- if (is_feat_ssbs_present()) {
+ if (is_feat_ssbs_supported()) {
return SMC_WA_DO_NOT;
}
@@ -207,7 +207,7 @@ static uintptr_t smccc_arch_feature_availability(u_register_t reg,
bitmask &= SCR_EL3_FEATS;
bitmask ^= SCR_EL3_FLIPPED;
/* will only report 0 if neither is implemented */
- if (is_feat_rng_trap_supported() || is_feat_rng_present()) {
+ if (is_feat_rng_trap_supported() || is_feat_rng_supported()) {
bitmask |= SCR_TRNDR_BIT;
check &= ~SCR_TRNDR_BIT;
}
diff --git a/services/std_svc/rmmd/rmmd_main.c b/services/std_svc/rmmd/rmmd_main.c
index c648a452a..366ed8935 100644
--- a/services/std_svc/rmmd/rmmd_main.c
+++ b/services/std_svc/rmmd/rmmd_main.c
@@ -168,8 +168,7 @@ int rmmd_setup(void)
struct rmm_manifest *manifest;
int rc;
- /* Make sure RME is supported. */
- if (is_feat_rme_present() == 0U) {
+ if (!is_feat_rme_supported()) {
/* Mark the RMM boot as failed for all the CPUs */
rmm_boot_failed = true;
return -ENOTSUP;
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-08 10:44:56 +0000