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| author | Dmitry Rokosov <ddrokosov@salutedevices.com> | 2024-03-27 15:04:10 +0300 |
|---|---|---|
| committer | Dmitry Rokosov <rockosov@rulkc.org> | 2026-08-13 14:41:32 +0300 |
| commit | 33349293ea5e7dab9fa99b31a3acfb9f04a4158a (patch) | |
| tree | 3df244a97756e909f48533c27c0677d217086e78 | |
| parent | 9654ab6e77f3a59784fbdc522a744dea67616189 (diff) | |
| download | linux-33349293ea5e7dab9fa99b31a3acfb9f04a4158a.tar.gz linux-33349293ea5e7dab9fa99b31a3acfb9f04a4158a.zip | |
arm64: dts: amlogic: a1: add new input clock 'sys_pll' to clkc_periphs
The 'sys_pll' input is an optional clock that can be used to generate
'sys_pll_div16', which serves as one of the sources for the GEN clock.
Signed-off-by: Dmitry Rokosov <rockosov@rulkc.org>
| -rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index ccb55b02ce31..3e51b1b9b8b2 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -763,10 +763,12 @@ <&clkc_pll CLKID_FCLK_DIV5>, <&clkc_pll CLKID_FCLK_DIV7>, <&clkc_pll CLKID_HIFI_PLL>, - <&xtal>; + <&xtal>, + <&clkc_pll CLKID_SYS_PLL>; clock-names = "fclk_div2", "fclk_div3", "fclk_div5", "fclk_div7", - "hifi_pll", "xtal"; + "hifi_pll", "xtal", + "sys_pll"; }; i2c0: i2c@1400 { |