diff options
| author | Serge Semin <fancer.lancer@gmail.com> | 2023-08-18 00:57:45 +0800 |
|---|---|---|
| committer | Serge Semin <fancer.lancer@gmail.com> | 2026-08-13 20:38:43 +0300 |
| commit | 01e194d68f64c7ecb72e46a32f35c9b726d996ee (patch) | |
| tree | 3b68347ad4762aa32ed9a7366a9768935a0cb072 | |
| parent | 4db915253f713a182b8cd01a332be313e352c37b (diff) | |
| download | linux-01e194d68f64c7ecb72e46a32f35c9b726d996ee.tar.gz linux-01e194d68f64c7ecb72e46a32f35c9b726d996ee.zip | |
net: stmmac: xgmac: Use interrupt mode INTM=1 for multi-MSI
The INTM=0 interrupt mode causes both respective per-channel
sbd_perch_[tx|rx]_intr_o and common sbd_intr_o signals being triggered on
the RI/TI status bits change. The later event is not only redundant in
this case but less efficient since both IRQs handlers will be called due
to a single event thus wasting the CPU resources. Let's enable the INTM=1
mode which implies triggering the per-channel signals only on the normal
RI/TI IRQs.
Note a similar fix has been incorporated to the DW GMAC4 sub-module in the
commit 6ccf12ae111e ("net: stmmac: use interrupt mode INTM=1 for
multi-MSI").
Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 | ||||
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 6 |
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index 24ed95954b651..c40c59ed2626a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -355,6 +355,8 @@ /* DMA Registers */ #define XGMAC_DMA_MODE 0x00003000 +#define XGMAC_INTM GENMASK(13, 12) +#define XGMAC_INTM_MODE1 0x1 #define XGMAC_SWR BIT(0) #define XGMAC_DMA_SYSBUS_MODE 0x00003004 #define XGMAC_WR_OSR_LMT GENMASK(29, 24) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c index a05f448bfd7a4..dabca4e4b8e0d 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c @@ -32,6 +32,12 @@ static void dwxgmac2_dma_init(void __iomem *ioaddr, value |= XGMAC_EAME; writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE); + + if (dma_cfg->multi_msi_en) { + value = readl(ioaddr + XGMAC_DMA_MODE); + FIELD_MODIFY(XGMAC_INTM, &value, XGMAC_INTM_MODE1); + writel(value, ioaddr + XGMAC_DMA_MODE); + } } static void dwxgmac2_dma_init_chan(struct stmmac_priv *priv, |