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authorSerge Semin <fancer.lancer@gmail.com>2026-06-19 17:42:44 +0300
committerSerge Semin <fancer.lancer@gmail.com>2026-08-06 03:24:25 +0300
commit5a56c3197471868f0985796d07a31f33a38c49cd (patch)
tree9050e96cffd0ee18dbd04459f9b27735b35b5872
parent2d9925b2c38d92fc5a9b95937564103cf391088b (diff)
downloadlinux-5a56c3197471868f0985796d07a31f33a38c49cd.tar.gz
linux-5a56c3197471868f0985796d07a31f33a38c49cd.zip
spi: dw: Inform core subsystem with a max number of native CS
The driver has been capable of auto-detecting the number of native CS since commit e164be7e1e93 ("spi: dw: Add a number of native CS auto-detection") unless the glue-code has the actual number of the CS defined. Let's use that data to inform the SPI core about that. Thus it will be able to perform additional sanity checks on the GPIO CS initialization procedure. It will be especially useful seeing the driver sets the SPI_CONTROLLER_GPIO_SS flag requiring the native CS being enabled in the GPIO-based CS case. Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
-rw-r--r--drivers/spi/spi-dw-core.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index b47637888c5c6..fe94fa134866e 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -960,6 +960,7 @@ int dw_spi_add_controller(struct device *dev, struct dw_spi *dws)
ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
ctlr->bus_num = dws->bus_num;
ctlr->num_chipselect = dws->num_cs;
+ ctlr->max_native_cs = dws->num_cs;
ctlr->setup = dw_spi_setup;
ctlr->cleanup = dw_spi_cleanup;
ctlr->transfer_one = dw_spi_transfer_one;