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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2026-08-26 13:27:25 +0100 |
|---|---|---|
| committer | Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> | 2026-09-02 12:46:21 +0200 |
| commit | 3b04e9b8056e868c3e9a04cc74168c7c9a18746a (patch) | |
| tree | 6e0c117177973f3360cbf37ffee649d68c73626f /scripts/Makefile.thinlto | |
| parent | cee9395acd8043be0644b25c34bfa86623f2b935 (diff) | |
| download | linux-next-3b04e9b8056e868c3e9a04cc74168c7c9a18746a.tar.gz linux-next-3b04e9b8056e868c3e9a04cc74168c7c9a18746a.zip | |
power: sequencing: Add Renesas RZ/G3L Power Ready driver
Add a power sequencing driver for the Renesas RZ/G3L PWRRDY module,
which signals power readiness for various IPs (USB, DSI, CSI etc.) on the
SoC. The driver binds as an auxiliary device to the parent SYSC driver,
using its regmap to toggle the SYS_PWRRDY_N register bits, and exposes
{usb,dsi,csi}-pwrrdy pwrseq targets.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20260826122742.153643-4-biju.das.jz@bp.renesas.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Diffstat (limited to 'scripts/Makefile.thinlto')
0 files changed, 0 insertions, 0 deletions