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authorAntoniu Miclaus <antoniu.miclaus@analog.com>2026-08-26 14:16:13 +0300
committerJonathan Cameron <jonathan.cameron@oss.qualcomm.com>2026-08-31 02:58:31 +0100
commit783211907c2df6e8a1cce892a67d99c943ef6404 (patch)
treecb06cfb3085db86e585cca90738838d62d96a05b /scripts/Makefile.thinlto
parent03389bea2ec76e0ffe4865b4d6cec575ac9f98b8 (diff)
downloadlinux-next-783211907c2df6e8a1cce892a67d99c943ef6404.tar.gz
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iio: adc: ad4080: allow debugfs register access to both channels
The dual-channel parts (AD4880/AD4883/AD4884) are built from two independent ADC dies, each with its own SPI chip select and register map. They are presented as a single IIO device because the FPGA interleaves both dies into one DMA stream, so only one direct_reg_access debugfs file is created and it can only reach channel A's regmap. Channel B's registers are therefore inaccessible, which blocks bring-up and debugging of the second die. Select the target die through the debugfs register address: the low 8 bits are the register offset and the upper bits are the channel index (0x0nn selects channel A, 0x1nn channel B). A read returns the real register value of the selected die and each die is addressed independently; single-channel parts only accept channel 0. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
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