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| author | Chen-Yu Tsai <wenst@chromium.org> | 2026-08-27 18:57:36 +0800 |
|---|---|---|
| committer | Uwe Kleine-König <ukleinek@kernel.org> | 2026-09-08 11:50:38 +0200 |
| commit | c5b29baad42b2b02389cc6a716697a8a63209930 (patch) | |
| tree | 99eae6a7a420ca48138a6d2bb43028ef169dccce /scripts/basic/split-include.c | |
| parent | a662d944da1e9236a99355aa3e8a93735d8b3521 (diff) | |
| download | linux-next-c5b29baad42b2b02389cc6a716697a8a63209930.tar.gz linux-next-c5b29baad42b2b02389cc6a716697a8a63209930.zip | |
pwm: mtk-disp: Fix period readback
The period value stored in the register is the number of clock cycles - 1.
Account for the offset when calculating the period in nanoseconds. This
fixes the discrepancy reported by the pwm core when CONFIG_PWM_DEBUG=1:
mediatek-disp-pwm 1100e000.pwm: .apply is not idempotent
(ena=1 pol=0 281500/499875) -> (ena=1 pol=0 281500/499750)
Calculation discrepancy in the driver was found by AI run by a colleague
while debugging another PWM related issue. Check against SoC datasheet
and fix done by the author.
Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()")
Cc: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Fei Shao <fshao@chromium.org>
Link: https://patch.msgid.link/20260827105738.8570-1-wenst@chromium.org
[ukleinek: Adapt comment accordingly]
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
Diffstat (limited to 'scripts/basic/split-include.c')
0 files changed, 0 insertions, 0 deletions