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3 daysMerge branch 'icc-kuno' into icc-nextGeorgi Djakov
Add interconnect (NoC) provider driver for the Qualcomm Kuno SoC. * icc-kuno dt-bindings: interconnect: Add Qualcomm Kuno NoC interconnect: qcom: Add Kuno interconnect provider driver Link: https://patch.msgid.link/20260827-kuno-soc-support-v5-0-6d47636a8f09@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
3 daysMerge branch 'icc-fixes' into icc-nextGeorgi Djakov
* icc-fixes interconnect: qcom: use 64-bit SMD RPM bus votes Signed-off-by: Georgi Djakov <djakov@kernel.org>
3 daysinterconnect: qcom: use 64-bit SMD RPM bus votesKonrad Dybcio
SMD RPM bus bandwidth requests carry a 64-bit bandwidth value. The interconnect proxy declared the KVP payload as u32, truncating votes above 4 GiB/s and advertising the wrong payload size to RPM. Use a little-endian 64-bit payload and accept a u64 value in the proxy API. This has always been the right behavior, even on msm-3.10 and 32-bit SoCs. Fixes: be06f8e7425d ("interconnect: qcom: Add interconnect RPM over SMD driver") Assisted-by: LLM Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Link: https://patch.msgid.link/20260904-topic-icc_rpm_64b_req-v1-1-37e24f1991a3@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
3 daysMerge branch 'icc-misc' into icc-nextGeorgi Djakov
* icc-misc interconnect: qcom: Constify struct qcom_icc_qosbox interconnect: fix typo "commited" in comments Signed-off-by: Georgi Djakov <djakov@kernel.org>
3 daysinterconnect: fix typo "commited" in commentsHemanth Selam
Correct "commited" to "committed", reported by scripts/checkpatch.pl using the misspelling list in scripts/spelling.txt. Only touches comments, no code changes. Assisted-by: Cursor:claude-opus-5 Signed-off-by: Hemanth Selam <hemanth.selam@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260904111632.29262-1-hemanth.selam@gmail.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
3 daysinterconnect: qcom: Constify struct qcom_icc_qosboxChristophe JAILLET
'struct qcom_icc_qosbox' are not modified in these drivers. Constifying these structures moves some data to a read-only section, so increases overall security. On a x86_64, with allmodconfig: Before: ====== text data bss dec hex filename 7807 18632 0 26439 6747 drivers/interconnect/qcom/eliza.o 10027 20176 0 30203 75fb drivers/interconnect/qcom/milos.o 8768 22640 0 31408 7ab0 drivers/interconnect/qcom/sm6350.o 7626 22000 0 29626 73ba drivers/interconnect/qcom/sm8650.o After: ===== text data bss dec hex filename 8095 18344 0 26439 6747 drivers/interconnect/qcom/eliza.o 11079 19120 0 30199 75f7 drivers/interconnect/qcom/milos.o 9668 21744 0 31412 7ab4 drivers/interconnect/qcom/sm6350.o 8746 20880 0 29626 73ba drivers/interconnect/qcom/sm8650.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://patch.msgid.link/f9d9ab49e961b3bf3f9bad39f22cf8b06afb2381.1786554463.git.christophe.jaillet@wanadoo.fr Signed-off-by: Georgi Djakov <djakov@kernel.org>
3 daysinterconnect: qcom: Add Kuno interconnect provider driverHardeep Sharma
Add the interconnect provider driver for the Qualcomm Kuno SoC to enable bus bandwidth voting on the platform. This includes the aggre-noc and cnoc-main NoC instances with their associated BCM nodes. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Hardeep Sharma <hardeep.sharma@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://patch.msgid.link/20260827-kuno-soc-support-v5-7-6d47636a8f09@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
4 daysinterconnect: qcom: Add missing depends to Hawi, Maili, Nord and ShikraKrzysztof Kozlowski
Hawi, Maili, Nord and Shikra were added in parallel or after commit 5b696f065843 ("interconnect: qcom: Restrict drivers per ARM/ARM64"), thus they missed the update restricting them per architecture (with the same rationale). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260720-interconnect-qcom-clean-arm64-v3-2-942e8ee7ebda@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
4 daysinterconnect: qcom: Make important drivers defaultKrzysztof Kozlowski
The interconnect drivers for Qualcomm SoC Network-on-Chip are covering a basic or fundamental SoC feature: bandwidth management between internal SoC blocks. SoC can boot without these, but power management or performance will be affected. These drivers do not represent any sort of buses visible to the board designers/configurators, thus they should be always enabled, regardless how SoC is used in the final board. Kernel configuration should not ask users choice of drivers when that choice is obvious and known to the developers that answer should be 'yes' or 'module'. Switch all almost Qualcomm interconnect drivers to a default 'yes' for ARCH_QCOM. This has impact: 1. arm64 defconfig: a. Enable as built-in INTERCONNECT_QCOM_HAWI, INTERCONNECT_QCOM_NORD, INTERCONNECT_QCOM_SDM660, INTERCONNECT_QCOM_SDM670, INTERCONNECT_QCOM_SM7150 and INTERCONNECT_QCOM_SAR2130P, which were not selected before but should be, because these platforms need them anyway for proper functioning. b. Switch to built-in from a module INTERCONNECT_QCOM_QCS404 and INTERCONNECT_QCOM_MSM8916, which as modules would not make the platform bootable in most cases, and INTERCONNECT_QCOM_OSM_L3, which when module might slow down boot considerably by having caches running at slow speed. 2. arm qcom_defconfig: Switch to built-in from a module INTERCONNECT_QCOM_RPMH, INTERCONNECT_QCOM_SMD_RPM, INTERCONNECT_QCOM_BCM_VOTER, INTERCONNECT_QCOM_MSM8974, INTERCONNECT_QCOM_SDX55, which as modules would not make the platform bootable in most cases. 3. arm multi_v7 defconfig: Enable drivers necessary to boot ARM 32-bit platforms, which are already enabled on qcom_defconfig: a. Enable as built-in INTERCONNECT_QCOM_MSM8974. b. Enable as modules (other dependencies prevent from built-in) INTERCONNECT_QCOM_RPMH, INTERCONNECT_QCOM_BCM_VOTER and INTERCONNECT_QCOM_SDX55. 4. COMPILE_TEST builds: Enable by default all drivers for arm or arm64 builds, whenever ARCH_QCOM is selected. This has impact on build time and feels logical, because if one selects ARCH_QCOM then probably by default wants to build test it entirely. Kernels with COMPILE_TEST are not supposed to be used for booting. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260720-interconnect-qcom-clean-arm64-v3-1-942e8ee7ebda@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
4 daysinterconnect: qcom: Enable Shikra interconnect driver by default for ARCH_QCOMRaviteja Laggyshetty
Interconnect drivers provide fundamental NoC bandwidth management required for correct system behavior. Although systems can boot without them, power and performance are impacted. These drivers need to enabled irresepective of the board variant, design or configuration. Enable the Shikra interconnect driver by default on ARCH_QCOM by setting "default ARCH_QCOM". Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260526-shikra_icc_kconfig-v1-1-c589db2d023c@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-08-19Merge tag 'icc-7.3-rc1' of ↵Greg Kroah-Hartman
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: This pull request contains the following interconnect updates for the 7.3-rc1 merge window: - New driver for Maili SoC - Add support for QoS on the SC8280XP SoC - Add support for QoS on the x1e80100 SoC - Add EPSS L3 scaling support for Shikra SoC - Add COMPILE_TEST support for some platforms - Misc tiny improvements and fixes Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-7.3-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc: interconnect: Fix use after free in icc_get() and of_icc_get_by_index() interconnect: debugfs-client: add NULL check for platform_device_alloc interconnect: qcom: simplify allocation interconnect: qcom: add COMPILE_TEST interconnect: qcom: add Maili interconnect provider driver dt-bindings: interconnect: qcom: document the RPMh Network-On-Chip interconnect in Maili SoC interconnect: qcom: Add EPSS L3 scaling support for Shikra SoC dt-bindings: interconnect: qcom,osm-l3: Add EPSS L3 DT binding for Qualcomm Shikra SoC interconnect: qcom: x1e80100: enable QoS configuration dt-bindings: interconnect: qcom,x1e80100-rpmh: add clocks property to enable QoS interconnect: qcom: sc8280xp: Enable QoS configuration dt-bindings: interconnect: qcom,sc8280xp-rpmh: Add reg and clocks for QoS
2026-07-22Merge branch 'icc-misc' into icc-nextGeorgi Djakov
* icc-misc interconnect: qcom: add COMPILE_TEST interconnect: qcom: simplify allocation interconnect: debugfs-client: add NULL check for platform_device_alloc interconnect: Fix use after free in icc_get() and of_icc_get_by_index() Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-22Merge branch 'icc-maili' into icc-nextGeorgi Djakov
Add interconnect bindings and RPMh-based interconnect driver support for the upcoming Qualcomm Maili SoC. * icc-maili dt-bindings: interconnect: qcom: document the RPMh Network-On-Chip interconnect in Maili SoC interconnect: qcom: add Maili interconnect provider driver Link: https://patch.msgid.link/20260622-maili_icc-v2-0-18b5ac08c04f@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-22Merge branch 'icc-shikra' into icc-nextGeorgi Djakov
Add Epoch Subsystem (EPSS) L3 scaling support on Qualcomm Shikra SoC. EPSS hardware on Shikra is similar to other SoCs but supports only twelve L3 frequency entries (LUT). Reading the LUT beyond supported frequencies can expose incorrect frequencies. Introduce new compatible to represent this constrained variant of EPSS. * icc-shikra dt-bindings: interconnect: qcom,osm-l3: Add EPSS L3 DT binding for Qualcomm Shikra SoC interconnect: qcom: Add EPSS L3 scaling support for Shikra SoC Link: https://patch.msgid.link/20260603-shikra_epss_l3-v3-0-3c2e0b796e78@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-22interconnect: qcom: simplify allocationRosen Penev
Use a flexible array member to reduce allocation by 1. Add __counted_by for extra runtime analysis. Move counting variable assignment after allocation before any array access. Signed-off-by: Rosen Penev <rosenp@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260609222454.37352-1-rosenp@gmail.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-22interconnect: qcom: add COMPILE_TESTRosen Penev
Allow non-ARM to build this. Signed-off-by: Rosen Penev <rosenp@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://patch.msgid.link/20260608050542.6167-1-rosenp@gmail.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-07interconnect: qcom: add Maili interconnect provider driverRaviteja Laggyshetty
Add driver for the Qualcomm interconnect buses found in Maili based platforms. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pairs. Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260622-maili_icc-v2-2-18b5ac08c04f@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-07interconnect: qcom: Add EPSS L3 scaling support for Shikra SoCRaviteja Laggyshetty
Add Epoch Subsystem (EPSS) L3 interconnect provider support on Qualcomm Shikra SoC. The EPSS L3 block on Shikra SoC is similar to existing Qualcomm EPSS/OSM L3 providers, but supports only up to 12 frequency lookup table entries. Reading beyond the supported LUT entries can expose incorrect frequencies. Add shikra-specific EPSS descriptor shikra_epss_l3_perf_state that reuses existing EPSS configuration with appropriate LUT entries limit. Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Link: https://patch.msgid.link/20260603-shikra_epss_l3-v3-2-3c2e0b796e78@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-07Merge branch 'icc-x1e80100' into icc-nextGeorgi Djakov
This series enables QoS configuration for QNOC type device which can be found on X1E80100 platform. It enables QoS configuration for master ports with predefined priority and urgency forwarding. This helps in prioritizing the traffic originating from different interconnect masters at NOC (Network On Chip). The system may function normally without this feature. However, enabling QoS helps optimize latency and bandwidth across subsystems like CPU, GPU, and multimedia engines, which becomes important in high-throughput scenarios. This is a feature aimed at performance enhancement to improve system performance under concurrent workloads. * icc-x1e80100 dt-bindings: interconnect: qcom,x1e80100-rpmh: add clocks property to enable QoS interconnect: qcom: x1e80100: enable QoS configuration Link: https://patch.msgid.link/20260527-x1e80100_qos-v2-0-305c6539e6d2@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-07interconnect: qcom: x1e80100: enable QoS configurationRaviteja Laggyshetty
Enable QoS configuration for master ports with predefined priority and urgency forwarding. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Link: https://patch.msgid.link/20260527-x1e80100_qos-v2-2-305c6539e6d2@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-07interconnect: qcom: sc8280xp: Enable QoS configurationXilin Wu
Enable static QoS configuration for SC8280XP NoC master ports with predefined priority and urgency forwarding values. Add the QoS box data for the SC8280XP providers, add regmap configurations for the real NoCs, and mark only aggre1_noc and aggre2_noc as requiring clocks for QoS register access. Signed-off-by: Xilin Wu <sophon@radxa.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://patch.msgid.link/20260507-sc8280xp-qos-v1-2-15135858cd98@radxa.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-03Replace <linux/mod_devicetable.h> by more specific <linux/device-id/*.h> (c ↵Uwe Kleine-König (The Capable Hub)
files) Replace the #include of <linux/mod_devicetable.h> by the more specific <linux/device-id/*.h> where applicable. For most cases the include can be dropped completely, only a few drivers need one or two headers added. Acked-by: Danilo Krummrich <dakr@kernel.org> Acked-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com>
2026-05-22Merge branch 'icc-misc' into icc-nextGeorgi Djakov
* icc-misc interconnect: Do not create empty devres on missing interconnects interconnect: Move MODULE_DEVICE_TABLE next to the table itself dt-bindings: interconnect: qcom,sdm660: Disallow clocks when appropriate dt-bindings: interconnect: qcom,sm6115: Drop incorrect children if:then: block dt-bindings: interconnect: qcom,sm6115: Restrict children and clocks interconnect: qcom: Fix indentation interconnect: qcom: Restrict drivers per ARM/ARM64 Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-21Merge branch 'icc-hawi' into icc-nextGeorgi Djakov
Add interconnect bindings and RPMh-based interconnect driver support for the upcoming Qualcomm Hawi SoC. * icc-hawi dt-bindings: interconnect: qcom-bwmon: Add Hawi cpu-bwmon compatible dt-bindings: interconnect: qcom-bwmon: Add Hawi llcc-bwmon compatible dt-bindings: interconnect: qcom: document the RPMh NoC for Hawi SoC interconnect: qcom: add Hawi interconnect provider driver Link: https://patch.msgid.link/20260506-icc-hawi-v4-0-35447fdc482b@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-21interconnect: qcom: add Hawi interconnect provider driverVivek Aknurwar
Add driver for the Qualcomm interconnect buses found in Hawi based platforms. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pair. Reviewed-by: Mike Tipton <mike.tipton@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com> Link: https://patch.msgid.link/20260506-icc-hawi-v4-2-35447fdc482b@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-21Merge branch 'icc-eliza' into icc-nextGeorgi Djakov
Add the missing Eliza SDCC1 interconnect slave ID and provider node. The Eliza interconnect binding and provider already describe SDCC2, but the matching SDCC1 CNOC CFG slave was left out. Add the binding constant and the provider node so consumers can describe SDCC1 bandwidth paths. The provider change also adds qhs_sdc1 to qsm_cfg and bcm_cn0, and updates the qsm_cfg link count and bcm_cn0 node count. * icc-eliza dt-bindings: interconnect: qcom,eliza-rpmh: Add SDCC1 slave interconnect: qcom: eliza: Add SDCC1 slave node Link: https://patch.msgid.link/20260514-eliza-interconnect-add-missing-sdcc1-slave-node-v2-0-13c03bc890cb@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-21Merge branch 'icc-nord' into icc-nextGeorgi Djakov
This adds RPMh-based interconnect support for the Qualcomm Nord SoC. The Nord SoC features a rich Network-on-Chip topology comprising 19 NoCs including aggregate NoCs, a high-speed configuration NoC (HSCNOC), a multimedia NoC, four NSP data NoCs for AI/ML workloads, PCIe inbound and outbound NoCs, a system NoC, and virtual clock/MC nodes. Bandwidth requests are communicated to the RPMh hardware through Bus Clock Manager (BCM) resources via the Resource State Coordinator (RSC). * icc-nord dt-bindings: interconnect: Document RPMh Network-On-Chip for Qualcomm Nord SoC interconnect: qcom: Add interconnect provider driver for Nord SoC Link: https://patch.msgid.link/20260510020607.1129773-1-shengchao.guo@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-15interconnect: qcom: eliza: Add SDCC1 slave nodeAbel Vesa
The Eliza interconnect provider is missing the SDCC1 CNOC CFG slave node. Add qhs_sdc1 to the provider node table so SDCC1 interconnect paths can resolve to a provider node. Hook qhs_sdc1 up to qsm_cfg and CN0, and bump the corresponding qsm_cfg.num_links and bcm_cn0.num_nodes counts. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260514-eliza-interconnect-add-missing-sdcc1-slave-node-v2-2-13c03bc890cb@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-10interconnect: qcom: Restrict drivers per ARM/ARM64Krzysztof Kozlowski
There is no point to allow selecting core SoC drivers like interconnects for Qualcomm ARMv7 SoCs when building ARM64 kernel, and vice versa. This makes kernel configuration more difficult as many do not remember the Qualcomm SoCs model names/numbers and their properties like architecture. No features should be lost because: 1. There won't be a single image for ARMv7 and ARMv8/9 SoCs. 2. Newer ARMv8/9 SoCs won't be running in arm32 emulation mode. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260428-interconnect-qcom-clean-arm64-v1-2-e6bc3f7832db@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-10interconnect: qcom: Fix indentationKrzysztof Kozlowski
KConfig entries should be indented starting with one tab, so replace spaces with it. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260428-interconnect-qcom-clean-arm64-v1-1-e6bc3f7832db@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-10interconnect: Move MODULE_DEVICE_TABLE next to the table itselfKrzysztof Kozlowski
By convention MODULE_DEVICE_TABLE() immediately follows the ID table it exports, because this is easier to read and verify. It also makes more sense since #ifdef for ACPI or OF could hide both of them. Most of the privers already have this correctly placed, so adjust the missing ones. No functional impact. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260505102854.186925-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-10interconnect: qcom: Add interconnect provider driver for Nord SoCOdelu Kukatla
Add driver for the Qualcomm interconnect buses found on Nord SoC. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pair. Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Link: https://patch.msgid.link/20260510020607.1129773-3-shengchao.guo@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-05-10interconnect: qcom: add Shikra interconnect provider driverRaviteja Laggyshetty
Add driver for the Qualcomm interconnect buses found in Shikra based platforms. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pairs. Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Link: https://patch.msgid.link/20260505-shikra_icc-v3-2-8e03ff27c007@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-04-07Merge tag 'icc-7.1-rc1' of ↵Greg Kroah-Hartman
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: This pull request contains the interconnect changes for the 7.1-rc1 merge window. They are listed below: - New driver for Mahua SoC - New driver for Eliza SoC - Enable QoS support for QCS8300 and QCS615 SoCs - Add L3 cache scaling compatibles for SM8550 and Eliza SoCs - Fix multiple issues in the msm8974 driver - Fix kfree mismatch - Misc cleanups - Add maintainer entry for the interconnect KUnit tests Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-7.1-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc: (22 commits) MAINTAINERS: Add interconnect kunit test entry interconnect: debugfs: fix devm_kstrdup and kfree mismatch interconnect: qcom: msm8974: expand DEFINE_QNODE macros interconnect: qcom: msm8974: switch to the main icc-rpm driver interconnect: qcom: let platforms declare their bugginess interconnect: qcom: define OCMEM bus resource interconnect: qcom: icc-rpm: allow overwriting get_bw callback interconnect: qcom: drop unused is_on flag dt-bindings: interconnect: qcom,msm8974: use qcom,rpm-common dt-bindings: interconnect: qcom,msm8974: drop bus clocks interconnect: qcom: qcs615: enable QoS configuration dt-bindings: interconnect: qcom,qcs615-rpmh: add clocks property to enable QoS interconnect: qcom: Add Eliza interconnect provider driver dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Eliza SoC dt-bindings: interconnect: OSM L3: Add Eliza EPSS L3 compatible interconnect: qcom: De-acronymize SoC names dt-bindings: interconnect: qcom,glymur-rpmh: De-acronymize SoC name dt-bindings: interconnect: OSM L3: Document sm8550 OSM L3 compatible interconnect: qcom: qcs8300: enable QoS configuration dt-bindings: interconnect: qcom,qcs8300-rpmh: add clocks property to enable QoS ...
2026-03-27Merge branch 'icc-msm8974' into icc-nextGeorgi Djakov
Commit d6edc31f3a68 ("clk: qcom: smd-rpm: Separate out interconnect bus clocks") moved control over several RPM resources from the clk-smd-rpm driver to the icc-rpm.c interconnect helpers. Most of the platforms were fixed before that commit or shortly after. However the MSM8974 was left as a foster child in broken state. Fix the loose ends and reenable interconnects on that platform. * icc-msm8974 dt-bindings: interconnect: qcom,msm8974: drop bus clocks dt-bindings: interconnect: qcom,msm8974: use qcom,rpm-common interconnect: qcom: drop unused is_on flag interconnect: qcom: icc-rpm: allow overwriting get_bw callback interconnect: qcom: define OCMEM bus resource interconnect: qcom: let platforms declare their bugginess interconnect: qcom: msm8974: switch to the main icc-rpm driver interconnect: qcom: msm8974: expand DEFINE_QNODE macros Link: https://msgid.link/20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com Tested-by: Alexandre Messier <alex@me.ssier.org> Tested-by: Luca Weiss <luca.weiss@fairphone.com> # fairphone-fp2 Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-26interconnect: qcom: msm8974: expand DEFINE_QNODE macrosDmitry Baryshkov
The rest of Qualcomm Interconnect drivers have stopped using DEFINE_QNODE long ago for the sake of readability. Stop using it inside the msm8974 interconnect driver too. Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://msgid.link/20260324-msm8974-icc-v2-8-527280043ad8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-26interconnect: qcom: msm8974: switch to the main icc-rpm driverDmitry Baryshkov
In preparation to restoring the ability of MSM8974 driver to work with the modern kernels, switch the driver to the main icc-rpm set of helper code. As platform-specific workarounds, set the get_bw callback (returning 0) to prevent initial setup from programming INT_MAX into the RPM (which otherwise might hang the platform) and tell RPM programming code to ignore -ENXIO errors from the firmware (until the QoS programming is sorted out). Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://msgid.link/20260324-msm8974-icc-v2-7-527280043ad8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-26interconnect: qcom: let platforms declare their bugginessDmitry Baryshkov
On MSM8974 programming some of the RPM resources results in the "resource does not exist" messages from the firmware. This occurs even with the downstream bus driver, which happily ignores the errors. My assumption is that these resources existed in the earlier firmware revisions but were later switched to be programmed differently (for the later platforms corresponding nodes use qos.ap_owned, which prevents those resources from being programmed. In preparation for conversion of the MSM8974 driver (which doesn't have QoS code yet) to the main icc-rpm set of helpers, let the driver declare that those -ENXIO errors must be ignored (for now). Later, when the QoS programming is sorted out (and more interconnects are added to the DT), this quirk might be removed. Reviewed-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://msgid.link/20260324-msm8974-icc-v2-6-527280043ad8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-26interconnect: qcom: define OCMEM bus resourceDmitry Baryshkov
Some of the platforms (MSM8974, MSM8x26) require voting on the OCMEM clock. Add new resource for that clock. Reviewed-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://msgid.link/20260324-msm8974-icc-v2-5-527280043ad8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-26interconnect: qcom: icc-rpm: allow overwriting get_bw callbackDmitry Baryshkov
MSM8974 requires a separate get_bw callback, since on that platform increasing the clock rate for some of the NoCs during boot may lead to hangs. For the details see commit 9caf2d956cfa ("interconnect: qcom: msm8974: Don't boost the NoC rate during boot"). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://msgid.link/20260324-msm8974-icc-v2-4-527280043ad8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-26interconnect: qcom: drop unused is_on flagDmitry Baryshkov
The commit 2e2113c8a64f ("interconnect: qcom: rpm: Handle interface clocks") has added the is_on flag to the qcom_icc_provider, but failed to actually utilize it. Drop the flag. Fixes: 2e2113c8a64f ("interconnect: qcom: rpm: Handle interface clocks") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://msgid.link/20260324-msm8974-icc-v2-3-527280043ad8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-17Merge branch 'icc-qcs615' into icc-nextGeorgi Djakov
This series enables QoS configuration for QNOC type device which can be found on QCS615 platform. It enables QoS configuration for master ports with predefined priority and urgency forwarding. This helps in prioritizing the traffic originating from different interconnect masters at NOC (Network On Chip). The system may function normally without this feature. However, enabling QoS helps optimize latency and bandwidth across subsystems like CPU, GPU, and multimedia engines, which becomes important in high-throughput scenarios. This is a feature aimed at performance enhancement to improve system performance under concurrent workloads. * icc-qcs615 dt-bindings: interconnect: qcom,qcs615-rpmh: add clocks property to enable QoS interconnect: qcom: qcs615: enable QoS configuration Link: https://msgid.link/20260311103548.1823044-1-odelu.kukatla@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-17interconnect: qcom: qcs615: enable QoS configurationOdelu Kukatla
Enable QoS configuration for master ports with predefined priority and urgency forwarding. Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://msgid.link/20260311103548.1823044-3-odelu.kukatla@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-14interconnect: qcom: sm8450: Fix NULL pointer dereference in icc_link_nodes()Vladimir Zapolskiy
The change to dynamic IDs for SM8450 platform interconnects left two links unconverted, fix it to avoid the NULL pointer dereference in runtime, when a pointer to a destination interconnect is not valid: Unable to handle kernel NULL pointer dereference at virtual address 0000000000000008 <...> Call trace: icc_link_nodes+0x3c/0x100 (P) qcom_icc_rpmh_probe+0x1b4/0x528 platform_probe+0x64/0xc0 really_probe+0xc4/0x2a8 __driver_probe_device+0x80/0x140 driver_probe_device+0x48/0x170 __device_attach_driver+0xc0/0x148 bus_for_each_drv+0x88/0xf0 __device_attach+0xb0/0x1c0 device_initial_probe+0x58/0x68 bus_probe_device+0x40/0xb8 deferred_probe_work_func+0x90/0xd0 process_one_work+0x15c/0x3c0 worker_thread+0x2e8/0x400 kthread+0x150/0x208 ret_from_fork+0x10/0x20 Code: 900310f4 911d6294 91008280 94176078 (f94002a0) ---[ end trace 0000000000000000 ]--- Kernel panic - not syncing: Oops: Fatal exception Fixes: 51513bec806f ("interconnect: qcom: sm8450: convert to dynamic IDs") Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://msgid.link/20260314012933.350644-1-vladimir.zapolskiy@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06Merge branch 'icc-qcs8300' into icc-nextGeorgi Djakov
This series enables QoS configuration for QNOC type device which can be found on QCS8300 platform. It enables QoS configuration for master ports with predefined priority and urgency forwarding. This helps in prioritizing the traffic originating from different interconnect masters at NOC (Network On Chip). The system may function normally without this feature. However, enabling QoS helps optimize latency and bandwidth across subsystems like CPU, GPU, and multimedia engines, which becomes important in high-throughput scenarios. This is a feature aimed at performance enhancement to improve system performance under concurrent workloads. * icc-qcs8300 dt-bindings: interconnect: qcom,qcs8300-rpmh: add clocks property to enable QoS interconnect: qcom: qcs8300: enable QoS configuration Link: https://msgid.link/20260127090116.1438780-1-odelu.kukatla@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06Merge branch 'icc-mahua' into icc-nextGeorgi Djakov
Mahua is a derivative of the Glymur SoC and shares a significant portion of its interconnect topology with Glymur. As such, this series extends the existing Glymur interconnect driver to support Mahua, reusing common definitions where possible and adding SoC-specific configurations where necessary. * icc-mahua dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Mahua SoC interconnect: qcom: glymur: Add Mahua SoC support Link: https://msgid.link/20260209-mahua_icc-v3-0-c65f3dfd72c8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06Merge branch 'icc-eliza' into icc-nextGeorgi Djakov
Add interconnect support for the Qualcomm Eliza SoC. * icc-eliza dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Eliza SoC interconnect: qcom: Add Eliza interconnect provider driver dt-bindings: interconnect: OSM L3: Add Eliza EPSS L3 compatible Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06interconnect: qcom: Add Eliza interconnect provider driverOdelu Kukatla
Add driver for the Qualcomm interconnect buses found in Eliza based platforms. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pairs. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://msgid.link/20260224-eliza-interconnect-v4-2-ad75855d5018@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06interconnect: qcom: De-acronymize SoC namesKrzysztof Kozlowski
Glymur and Kaanapali are codenames of Qualcomm SoCs, not acronyms. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://msgid.link/20260217130035.281752-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06interconnect: qcom: qcs8300: enable QoS configurationOdelu Kukatla
Enable QoS configuration for master ports with predefined priority and urgency forwarding. Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://msgid.link/20260127090116.1438780-3-odelu.kukatla@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-12 09:52:13 +0000