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# Conflicts:
# net/ceph/osd_client.c
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https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
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https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git
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https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git
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https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux.git
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https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux.git
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git
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https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git
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# New commits in irq/drivers:
0c65a1331928 ("irqchip/gic-v3: Add Altera SoCFPGA Agilex5 GIC600 DMA32 erratum workaround")
135d9e67f7ab ("irqchip/gic-v3-its: Don't WARN on LPI free allocation failure")
c6d93e52d8c8 ("soc/fsl/qe: qe_ports_ic: Drop redundant IRQ_DOMAIN_FLAG_DESTROY_GC")
404b7900e62b ("irqchip/lan966x-oic: Drop redundant IRQ_DOMAIN_FLAG_DESTROY_GC")
0aa45dce2afe ("irqdomain: Set IRQ_DOMAIN_FLAG_DESTROY_GC in __irq_domain_instantiate()")
726285316f8f ("irqchip: Fix typos and repeated words in comments")
c23c3a1ec322 ("irqchip/pruss-intc: Use scoped lock guard and devm_mutex_init")
02a2db115989 ("irqchip/pruss-intc: Use match data directly")
13ca1c0b7d8a ("arm64: dts: qcom: purwa: Drop the Hamoa workaround for PDC")
086eac130a94 ("irqchip/qcom-pdc: Add purwa compatible for PDC secondary mode")
9d6498c113b7 ("dt-bindings: interrupt-controller: qcom,pdc: Document Purwa PDC")
94713d60707b ("irqchip/gic-v5: Install root IRQ handler last in gicv5_init_common()")
5b104000160d ("irqchip/imsic: Use IPI_MAX instead of IMSIC_NR_IPI")
a89546503a0e ("irqchip/aclint-sswi: Use IPI_MAX for IPI muxing")
f6326e26f602 ("clocksource: clint: Use IPI_MAX for IPI muxing")
2a0d49514f29 ("riscv: sbi: Use IPI_MAX for SBI IPI muxing")
1ae91dc397eb ("riscv: smp: Move enum ipi_message_type to asm/smp.h")
bd94bea7165b ("arm64: defconfig: Drop redundant Qualcomm irqchip entries")
eeb693eb3f4c ("irqchip/qcom: Add defaults for desired SoC drivers")
1b852de05f74 ("irqchip/qcom: Enable compile testing for QCOM_PDC and QCOM_MPM")
b36bfa477b77 ("irqchip/gic: Simplify Maintenance Interrupt ACPI parsing")
bd7d57a03c4b ("irqchip/riscv-imsic: Use GENMASK for base address masks")
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Map qcom,nord to glymur_data in qcom_ubwc_configs[], since Nord shares
Glymur's UBWC capabilities.
Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260903014309.314962-1-shengchao.guo@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The GPIOD_FLAGS_BIT_NONEXCLUSIVE flag for gpiod_get() is deprecated. For
actually shared GPIOs, it should be replaced by using the functionality
provided by gpio-shared-proxy. The Freescale QUICC Engine GPIO driver
uses it as a workaround to access the GPIO descriptor already requested
by the caller of qe_pin_request() in order to access the private GPIO
chip data.
As the existing comment itself states, the user already requested this
GPIO and the only user in tree is the FHCI USB driver which does in fact
request it, we can safely modify the function to take the *exclusive*
GPIO descriptor as argument and stop using the deprecated flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lore.kernel.org/r/20260908-usb-fhci-drop-gpio-nonexclusive-v1-1-8e405dc67874@oss.qualcomm.com
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
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For legacy 32-bit Tegra devices, the warning in the
tegra_pmc_enter_suspend_mode() function is being triggered because the
early_pmc->rate variable is never configured and hence, always 0. This
issue started occurring after updating the PMC driver to create the PMC
context dynamically which causes the 'rate' to be set in the new dynamic
context, but missed updating the rate in the early PMC context.
Fix this by initialising the early_pmc->rate variable for 32-bit Tegra
devices when the rate for the PMC context is initialised.
Fixes: 4d61f0342689 ("soc/tegra: pmc: Create PMC context dynamically")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: move assignment to existing #ifdef block]
Signed-off-by: Thierry Reding <treding@nvidia.com>
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MT8189 couples its GPU supply (buck_vgpu) with the GPU SRAM supply
(ldo_sram_gpu), which is exactly the GPU<->SRAM relationship this
coupler already handles for MT8183, MT8186, MT8188 and MT8192.
Register the coupler on MT8189 as well so that both supplies stay
voltage-balanced.
Signed-off-by: Justin Yeh <justin.yeh@mediatek.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Now that __irq_domain_instantiate() automatically sets
IRQ_DOMAIN_FLAG_DESTROY_GC when dgc_info is provided, the explicit
flag in the irq_domain_info is redundant. Remove it.
Signed-off-by: Qingshuang Fu <fuqingshuang@kylinos.cn>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Herve Codina <herve.codina@bootlin.com>
Link: https://patch.msgid.link/20260907024046.28845-4-fuqingshuang@kylinos.cn
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A C=2 build on mpc83xx_defconfig provides following warnings:
drivers/soc/fsl/qe/gpio.c:44:34: warning: incorrect type in assignment (different base types)
drivers/soc/fsl/qe/gpio.c:44:34: expected restricted __be32 [usertype] cpdata
drivers/soc/fsl/qe/gpio.c:44:34: got unsigned int [usertype] cpdata
drivers/soc/fsl/qe/gpio.c:45:34: warning: incorrect type in assignment (different base types)
drivers/soc/fsl/qe/gpio.c:45:34: expected restricted __be32 [usertype] cpdir1
drivers/soc/fsl/qe/gpio.c:45:34: got unsigned int
drivers/soc/fsl/qe/gpio.c:46:34: warning: incorrect type in assignment (different base types)
drivers/soc/fsl/qe/gpio.c:46:34: expected restricted __be32 [usertype] cpdir2
drivers/soc/fsl/qe/gpio.c:46:34: got unsigned int
drivers/soc/fsl/qe/gpio.c:47:34: warning: incorrect type in assignment (different base types)
drivers/soc/fsl/qe/gpio.c:47:34: expected restricted __be32 [usertype] cppar1
drivers/soc/fsl/qe/gpio.c:47:34: got unsigned int
drivers/soc/fsl/qe/gpio.c:48:34: warning: incorrect type in assignment (different base types)
drivers/soc/fsl/qe/gpio.c:48:34: expected restricted __be32 [usertype] cppar2
drivers/soc/fsl/qe/gpio.c:48:34: got unsigned int
drivers/soc/fsl/qe/gpio.c:49:33: warning: incorrect type in assignment (different base types)
drivers/soc/fsl/qe/gpio.c:49:33: expected restricted __be32 [usertype] cpodr
drivers/soc/fsl/qe/gpio.c:49:33: got unsigned int
drivers/soc/fsl/qe/gpio.c:297:17: warning: restricted __be32 degrades to integer
drivers/soc/fsl/qe/gpio.c:299:17: warning: restricted __be32 degrades to integer
drivers/soc/fsl/qe/gpio.c:302:17: warning: restricted __be32 degrades to integer
drivers/soc/fsl/qe/gpio.c:304:17: warning: restricted __be32 degrades to integer
drivers/soc/fsl/qe/gpio.c:308:18: warning: restricted __be32 degrades to integer
drivers/soc/fsl/qe/gpio.c:314:9: warning: restricted __be32 degrades to integer
The problem is the 'struct qe_pio_reg' embedded in 'struct qe_gpio_chip'
to save register values. As the values are read with ioread32be(), they
are now in CPU byte order and can't be stored as-is in a __be32 object.
Replace 'struct qe_pio_reg saved_regs' by individual u32 fields.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202608051952.ADkLIB86-lkp@intel.com/
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202608130908.gEy44F1D-lkp@intel.com/
Link: https://lore.kernel.org/r/6a84b38e766729676b375c93bf54c67ea455288d.1786080840.git.chleroy@kernel.org
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
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The setup_cpuhp_and_cpuidle() parses the device tree node for the
interrupt generation block via of_parse_phandle() and decrements its
reference count using of_node_put() immediately after fetching the resource
address. However, later the intr_gen_node pointer is passed into
of_syscon_register_regmap().
Fix this by declaring intr_gen_node with __free() and removing
of_node_put().
Reported-by: Sashiko <sashiko-bot@kernel.org>
Closes: https://sashiko.dev/#/patchset/20260513-exynos850-cpuhotplug-v4-0-54fec5f65362@linaro.org?part=3
Fixes: 78b72897a5c8 ("soc: samsung: exynos-pmu: Enable CPU Idle for gs101")
Cc: stable@vger.kernel.org
Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
Link: https://patch.msgid.link/20260828-exynos-pmu-cpuhp-idle-fixes-v2-1-06bce6107bd6@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Add support for Renesas RZ/G2M v3.0 (a.k.a. R8A774A3) SoC to the R-Car
RST driver.
Signed-off-by: Ayman Chaudhry <ayman.chaudhry.kc@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260821150408.73829-6-ayman.chaudhry.kc@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add support to identify the Renesas RZ/G2M v3.0 (a.k.a. R8A774A3) SoC.
The RZ/G2M v3.0 is assigned the same Product ID Number in the Product
Register as the Renesas RZ/G2M v1.3 (a.k.a. R8A774A1), so use the same
SoC data.
Signed-off-by: Ayman Chaudhry <ayman.chaudhry.kc@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260821150408.73829-2-ayman.chaudhry.kc@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Every MFIS instance has a block of hardware spinlocks. Add support for
them. R-Car Gen4 has only one instance, so the base_id is always 0.
R-Car Gen5 has multiple instances, so the base_id has to be encoded in
the info description. Also being a provider, a hwspinlock-private
header needs to be included. Work to refactor the headers is on-going,
but will need many preparational steps. Until then, we need to live
with the special include.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260817095447.34693-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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This is another run of the Coccinelle script for converting kmalloc()
family of allocations to kmalloc_obj() via the existing rules in
scripts/coccinelle/api/kmalloc_objs.cocci
This catches both the set of kmalloc() uses added since the first
kmalloc_obj() conversions in v7.0 and adds a large group missed in the
first pass due to Coccinelle not interacting well with the cleanup.h
scoped_...() family of macros[1]. I worked around this with spatch's
"--macro-file" argument to a file with all the scoped_...() macros mapped
to Coccinelle's YACFE_ITERATOR[2] as that was the closest viable control
flow indicator I could find.
Build tested allmodconfig on x86, arm64, arm, loongarch, mips, powerpc,
riscv, and s390 with no new warnings.
Link: https://lore.kernel.org/lkml/202609021314.8A9C0B8@keescook/ [1]
Link: https://github.com/coccinelle/coccinelle/blob/master/standard.h [2]
Signed-off-by: Kees Cook <kees+treewide@kernel.org>
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Add Exynos5515 information to the soc_ids table.
The ChipID for Exynos5515 is "0xE5515000".
Signed-off-by: Aiden Isik <aidenisik@member.fsf.org>
Link: https://patch.msgid.link/20260818-for-next-lucky7-chipid-v2-2-28ae49f5c349@member.fsf.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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The entry->value is passed to readl() so should be marked __iomem
so remove these sparse warnings by marking it __iomem and do the
relevant casting to ensure no further warnings:
drivers/soc/qcom/smp2p.c:280:64: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:280:64: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:280:64: got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:318:34: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:318:34: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:318:34: got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:446:26: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:446:26: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:446:26: got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:501:33: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:501:33: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:501:33: got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:504:26: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/qcom/smp2p.c:504:26: expected void volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:504:26: got unsigned int [usertype] *value
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Link: https://lore.kernel.org/r/20260623085931.589735-1-ben.dooks@codethink.co.uk
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The RZ/G3L SYSC driver registers a "pwrseq-pwrrdy" auxiliary device to
handle the PWRRDY power sequencing, which requires the
pwrseq-renesas-pwrrdy driver to bind to it. Select
POWER_SEQUENCING_RENESAS_PWRRDY from SYSC_R9A08G046 so it's built
whenever RZ/G3L SYSC support is enabled.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20260826122742.153643-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Some RZ SoCs (e.g. RZ/G3L) have a PWRRDY register that is controlled
through a power sequencer rather than directly by the SYSC driver.
Add a pwrrdy_pwrseq flag to struct rz_sysc_soc_id_init_data to mark
SoCs with this property, and set it for RZ/G3L. When set,
rz_sysc_probe() registers a "pwrseq-pwrrdy" auxiliary device so a
dedicated driver can handle the PWRRDY sequencing.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20260826122742.153643-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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apr_add_device() publishes a service in svcs_idr before parsing the
optional protection domain and registering the device. If device
registration fails, put_device() frees the apr_device while its service
remains in the IDR. A received packet can then dereference that stale
entry. The property error path also leaves the service and allocation
behind.
Split device_register() into device_initialize() and device_add() so every
pre-registration error can safely drop the device reference. Remove the
service from the IDR on all failures after publication, then drain the RX
workqueue before dropping the device reference. This prevents an in-flight
lookup from outliving the device.
Fixes: 6adba21eb434 ("soc: qcom: Add APR bus driver")
Signed-off-by: Hongyan Xu <getshell@seu.edu.cn>
Link: https://lore.kernel.org/r/20260806060541.820-1-getshell@seu.edu.cn
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The "ver" variable is type "enum ddr_info_version". Enum types are
dependent on the compiler but in practical terms here, "ver" is
basically an unsigned int. It needs to be signed for the -EINVAL
to be handled correctly.
Fixes: 1d234eeafc56 ("soc: qcom: smem: Expose DDR data from SMEM")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/an1toQ-acGR0kOWj@stanley.mountain
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Describe the Universal Bandwidth Compression (UBWC) configuration
for the Maili platform. Maili reuses the hawi UBWC configuration.
Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260812-ubwc_for_hawi_maili-v1-2-c29edecb3bd8@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add UBWC configuration data for the Hawi platform, which uses UBWC 7.0
and enables the required flags and highest bank bit settings.
This allows drivers to query the correct UBWC capabilities on Hawi.
Also add UBWC 7.0 support to the version tag helper so that
qcom_ubwc_version_tag() returns the correct tag for UBWC 7.0.
Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260812-ubwc_for_hawi_maili-v1-1-c29edecb3bd8@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Two documentation issues in rpmh-rsc.c:
- rpmh_rsc_pd_callback() has a copy-paste title 'Check if any of
the AMCs are busy' which describes rpmh_rsc_ctrlr_is_busy() not
this function. Fix the title to accurately describe what this
callback does: flush sleep/wake TCS data on PM domain power-off.
- rpmh_rsc_cpu_pm_callback() has the same copy-paste title 'Check
if any of the AMCs are busy'. Fix the title to accurately describe
what this callback does: flush sleep/wake TCS data when all CPUs
enter power down.
No functional impact.
Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-3-0f5026293d9a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Six documentation issues in rpmh.c:
- struct batch_cache_req has a typo in its title: 'batch catch'
should be 'batch cache'. Fix it.
- __rpmh_write(), rpmh_write_async(), rpmh_write(), rpmh_write_batch()
and rpmh_invalidate() use 'name: title' format instead of the
'name() - title' format documented in
Documentation/doc-guide/kernel-doc.rst. Fix all of them.
- rpmh_tx_done() has no kernel-doc comment. Add one describing its
purpose as the RSC driver callback for active-only transfer
completion.
- __rpmh_write(), rpmh_write_async(), rpmh_write() and
rpmh_write_batch() are missing Return: tags. Add them.
- struct cache_req uses 'struct name:' format instead of the
'struct name -' format documented in
Documentation/doc-guide/kernel-doc.rst. Fix it.
- rpmh_write_batch() has an inaccurate description: it says requests
are sent 'without caching' and that SLEEP/WAKE_ONLY requests are
sent as fire-and-forget. In reality, SLEEP/WAKE_ONLY requests are
cached in batch_cache and returned immediately; they are only sent
to the controller later by rpmh_flush(). Fix the description.
No functional impact.
Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-2-0f5026293d9a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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kernel-doc emits two warnings for rpmh-internal.h:
Warning: drivers/soc/qcom/rpmh-internal.h:136 struct member 'ver' not described in 'rsc_drv'
Warning: drivers/soc/qcom/rpmh-internal.h:136 struct member 'regs' not described in 'rsc_drv'
Fix them by adding @ver and @regs entries to the struct rsc_drv
documentation.
While at it, add a missing kernel-doc block for struct rsc_ver, and
update the remaining struct kernel-doc comments (struct tcs_group,
struct rpmh_request, struct rpmh_ctrlr, struct rsc_drv) to use the
'struct name -' format documented in
Documentation/doc-guide/kernel-doc.rst.
No functional impact.
Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-1-0f5026293d9a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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For historical reasons, the GLINK smem interrupt is registered with
IRRQF_NO_SUSPEND flag set, which is the underlying problem here, since the
incoming messages can be delivered during late suspend and early
resume.
In this specific case, the pmic_glink_altmode_worker() currently gets
scheduled on the system_wq which can be scheduled to run while devices
are still suspended. This proves to be a problem when a Type-C retimer,
switch or mux that is controlled over a bus like I2C, because the I2C
controller is suspended.
This has been proven to be the case on the X Elite boards where such
retimers (ParadeTech PS8830) are used in order to handle Type-C
orientation and altmode configuration. The following warning is thrown:
[ 35.134876] i2c i2c-4: Transfer while suspended
[ 35.143865] WARNING: CPU: 0 PID: 99 at drivers/i2c/i2c-core.h:56 __i2c_transfer+0xb4/0x57c [i2c_core]
[ 35.352879] Workqueue: events pmic_glink_altmode_worker [pmic_glink_altmode]
[ 35.360179] pstate: 61400005 (nZCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--)
[ 35.455242] Call trace:
[ 35.457826] __i2c_transfer+0xb4/0x57c [i2c_core] (P)
[ 35.463086] i2c_transfer+0x98/0xf0 [i2c_core]
[ 35.467713] i2c_transfer_buffer_flags+0x54/0x88 [i2c_core]
[ 35.473502] regmap_i2c_write+0x20/0x48 [regmap_i2c]
[ 35.478659] _regmap_raw_write_impl+0x780/0x944
[ 35.483401] _regmap_bus_raw_write+0x60/0x7c
[ 35.487848] _regmap_write+0x134/0x184
[ 35.491773] regmap_write+0x54/0x78
[ 35.495418] ps883x_set+0x58/0xec [ps883x]
[ 35.499688] ps883x_sw_set+0x60/0x84 [ps883x]
[ 35.504223] typec_switch_set+0x48/0x74 [typec]
[ 35.508952] pmic_glink_altmode_worker+0x44/0x1fc [pmic_glink_altmode]
[ 35.515712] process_scheduled_works+0x1a0/0x2d0
[ 35.520525] worker_thread+0x2a8/0x3c8
[ 35.524449] kthread+0xfc/0x184
[ 35.527749] ret_from_fork+0x10/0x20
The proper solution here should be to not deliver these kind of messages
during system suspend at all, or at least make it configurable per glink
client. But simply dropping the IRQF_NO_SUSPEND flag entirely will break
other clients. The final shape of the rework of the pmic glink driver in
order to fulfill both the filtering of the messages that need to be able
to wake-up the system and the queueing of these messages until the system
has properly resumed is still being discussed and it is planned as a
future effort.
Meanwhile, the stop-gap fix here is to schedule the pmic glink altmode
worker on the system_freezable_wq instead of the system_wq. This will
result in the altmode worker not being scheduled to run until the
devices are resumed first, which will give the controllers like I2C a
chance to resume before the transfer is requested.
Reported-by: Johan Hovold <johan+linaro@kernel.org>
Closes: https://lore.kernel.org/lkml/Z1CCVjEZMQ6hJ-wK@hovoldconsulting.com/
Fixes: 080b4e24852b ("soc: qcom: pmic_glink: Introduce altmode support")
Cc: stable@vger.kernel.org # 6.3
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260819-b4-soc-qcom-pmic-glink-fix-device-access-on-worker-while-suspended-v3-1-169b00e0d9d4@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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platform_get_irq_optional() returns a positive IRQ number on success or
a negative error code on failure. For an optional IRQ, -ENXIO indicates
that no optional IRQ is available. Other errors, such as -EPROBE_DEFER
and -EINVAL, should be propagated so that the caller can handle them
appropriately.
Propagate negative errors other than -ENXIO.
Signed-off-by: bui duc phuc <phucduc.bui@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260819102630.68991-1-phucduc.bui@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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geni_find_protocol_fw() casts fw->data to a non-const struct se_fw_hdr
pointer and writes back the rounded-up fw_size value:
sefw->fw_size_in_items = cpu_to_le16(fw_size);
The firmware subsystem maps the firmware blob read-only. Writing through
the cast pointer causes a level-3 permission fault on AArch64 and
crashes the kernel during driver probe.
The write-back is no longer necessary: geni_find_protocol_fw() now
propagates the rounded size to the caller via fw_size_out. Remove the
write-back and make sefw (and the hdr pointer in the caller)
const-correct.
Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-4-43e6a3abd651@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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caller
fw_end was computed from the raw fw_size_in_items, before the odd-word
round-up. A segment with an odd word count could pass the bounds check
at the unrounded value but then be copied one word past the validated
limit. Move fw_end (and the cfg_{idx,val}_end) calculations to after
the round-up so they always reflect the true copy extent.
The caller geni_load_se_fw() re-read hdr->fw_size_in_items for the
memcpy_toio() length, bypassing the validated and rounded value
established by geni_find_protocol_fw(). Add a fw_size_out output
parameter and use it in the caller.
Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-3-43e6a3abd651@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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fw_size is read from the 16-bit fw_size_in_items field and incremented
when the count is odd. If fw_size_in_items == 0xffff the increment
wraps to 0 as a u16, making the bounds check below pass for a firmware
segment whose actual size was not validated. Widen fw_size to u32 so
the increment never wraps.
Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-2-43e6a3abd651@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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serial_protocol is declared as __le16 in struct se_fw_hdr, but was
decoded with le32_to_cpu(). On big-endian systems the extra byte swap
causes the field to always compare unequal to the protocol argument,
so no firmware segment is ever selected.
Use le16_to_cpu() to match the field width.
Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-1-43e6a3abd651@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add SoC ID for Qualcomm SM7250 SoC.
Signed-off-by: Sreeshankar K <sreeshankar0910@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260824150156.1310-3-sreeshankar0910@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Kuno, a 32-bit ARM Cortex-A7 Qualcomm SoC, uses the GENI-based QUP
wrapper for its debug UART. Drop the explicit ARM64 dependency so the
driver can be selected on 32-bit ARM as well; QCOM_GENI_SE already sits
under the QCOM_SOC menuconfig, which is gated by ARCH_QCOM ||
COMPILE_TEST, so no replacement dependency is needed.
Acked-by: Mukesh Savaliya <mukesh.savaliya@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Hardeep Sharma <hardeep.sharma@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260827-kuno-soc-support-v5-1-6d47636a8f09@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Since commit 55b48e23f5c4 ("genirq/devres: Add error handling in
devm_request_*_irq()"),
devm_request_irq() and devm_request_threaded_irq() automatically log
detailed error messages on failure. Remove the now-redundant
driver-specific dev_err() calls.
Signed-off-by: Pan Chuang <panchuang@vivo.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260723024248.17480-1-panchuang@vivo.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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apr_device_id was introduced in commit 6adba21eb434 ("soc: qcom: Add APR
bus driver") in 2018, and since then not a single driver made use of it.
So drop the unused id_table pointer from struct apr_driver and move
APR_NAME_SIZE to the apr header which still has a usage of it.
Note that with the id_table being NULL apr_device_match() degrades to just
of_driver_match_device(), so replace this callback accordingly.
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/r/e8b352f33ae38df3616dc157c1cafd13d49c5e3e.1784554037.git.u.kleine-koenig@baylibre.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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There are a number of points in the driver which miss out
on __iomem annotations, so add these to remove the following
sparse warnings:
drivers/soc/qcom/smsm.c:159:32: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smsm.c:159:32: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smsm.c:159:32: got unsigned int [usertype] *local_state
drivers/soc/qcom/smsm.c:171:25: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/qcom/smsm.c:171:25: expected void volatile [noderef] __iomem *addr
drivers/soc/qcom/smsm.c:171:25: got unsigned int [usertype] *local_state
drivers/soc/qcom/smsm.c:181:48: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smsm.c:181:48: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smsm.c:181:48: got unsigned int [usertype] *
drivers/soc/qcom/smsm.c:219:26: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smsm.c:219:26: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smsm.c:219:26: got unsigned int [usertype] *remote_state
drivers/soc/qcom/smsm.c:257:49: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smsm.c:257:49: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smsm.c:257:49: got unsigned int [usertype] *
drivers/soc/qcom/smsm.c:259:49: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/qcom/smsm.c:259:49: expected void volatile [noderef] __iomem *addr
drivers/soc/qcom/smsm.c:259:49: got unsigned int [usertype] *
drivers/soc/qcom/smsm.c:280:24: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smsm.c:280:24: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smsm.c:280:24: got unsigned int [usertype] *remote_state
drivers/soc/qcom/smsm.c:288:49: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smsm.c:288:49: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smsm.c:288:49: got unsigned int [usertype] *
drivers/soc/qcom/smsm.c:290:49: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/qcom/smsm.c:290:49: expected void volatile [noderef] __iomem *addr
drivers/soc/qcom/smsm.c:290:49: got unsigned int [usertype] *
drivers/soc/qcom/smsm.c:330:26: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smsm.c:330:26: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smsm.c:330:26: got unsigned int [usertype] *remote_state
drivers/soc/qcom/smsm.c:635:47: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/qcom/smsm.c:635:47: expected void volatile [noderef] __iomem *addr
drivers/soc/qcom/smsm.c:635:47: got unsigned int [usertype] *
Note, we don't fixup the qcom_smem_get() to return an __iomem annotated pointer.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Link: https://lore.kernel.org/r/20260623090954.620688-1-ben.dooks@codethink.co.uk
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Update the IPQ5424 LLCC slice configuration table to give the PPE
and Wi-Fi datapaths dedicated slices.
Assign slice IDs 1 and 5 to the PPE RX descriptor and RX fill use cases,
slice IDs 6 and 7 to the Wi-Fi radios connected over PCIe, and slice ID
2 to the CPU subsystem. Adjust the corresponding capacities, priorities,
and way masks for these consumers.
These slice assignments are based on recommendations from the
performance team, following throughput measurements on IPQ5424.
Having the dedicated slice configuration for each of these use cases
helps to improve the networking throughput by more than 1 Gbps.
Rename the usecase IDs for slice IDs 1 and 2 because LLCC_CPUSS and
LLCC_VIDSC0 do not describe the actual users of those slices.
Assisted-by: LLM
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260819-ipq5424_llcc_updates-v3-1-42b48451481d@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Glymur firmware provides a version 7 DDR-info SMEM entry whose 872-byte
layout is different from the one the driver supports today.
The data contains 16 channel descriptors, 14 DDR frequency slots, four
4 DDR region slots, a 10-entry SHUB frequency plan, and v6 misc information.
It accounts for 616 bytes; the captured SMEM entry has a further 256
zero bytes.
Add a Glymur-specific version 7 layout and recognize that complete entry.
Parse the DDR frequencies and highest-bank bit from the common fields.
Assisted-by: LLM
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260820-topic-glymur_dramc-v1-1-f714eef34e4d@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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smem_dram_parse_v3_14freqs_data() uses the little-endian
freq_khz field directly when scaling the frequency from kHz to Hz. This
produces byte-swapped values on big-endian systems.
Convert freq_khz to CPU byte order before using it, as the other DDR
data parsers do.
Fixes: 1d234eeafc56 ("soc: qcom: smem: Expose DDR data from SMEM")
Signed-off-by: Linmao Li <lilinmao@kylinos.cn>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260827020447.2642830-1-lilinmao@kylinos.cn
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The DDR frequency in SMEM is reported in kHz and converted to Hz by
multiplying it by 1000. Since the SMEM frequency value is a u32, using
an unsuffixed integer constant causes the multiplication to be performed
with 32-bit arithmetic.
This overflows for DDR frequencies above 4294967 kHz, resulting in an
incorrect frequency being reported through the SMEM DRAM interface.
Use an unsigned long constant for the multiplication so the calculation
is performed with 64-bit arithmetic on the supported Qualcomm platforms.
Apply the fix consistently to the v3, v3.1, v4, v5, and v7 SMEM parsers.
Fixes: 1d234eeafc56 ("soc: qcom: smem: Expose DDR data from SMEM")
Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260827-glymur_dramc-v1-1-eba358d504b8@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Tegra410 uses PMC driver only to retrieve system reset reason using PMC
sysfs. Tegra410 uses ACPI to probe PMC, unlike device-tree boot it does
not use the early initialisation sequence.
Add PMC support for Tegra410, which uses the PMC driver to retrieve
the system reset reason via PMC sysfs.
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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