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| author | sangram kumar yerra <sangram.k.y@intel.com> | 2026-08-18 16:58:30 +0530 |
|---|---|---|
| committer | Martin K. Petersen (Oracle) <mkp@kernel.org> | 2026-08-28 22:12:57 -0400 |
| commit | c46cc9cee39bd6f395ab9ac98b1794705df13d7c (patch) | |
| tree | 767dbfab5c820a0d488e4d6f5b05babbe0092c3e /scripts/Makefile.thinlto | |
| parent | ef675ea168453a9b3e635b8ac543f92938bdd03b (diff) | |
| download | linux-c46cc9cee39bd6f395ab9ac98b1794705df13d7c.tar.gz linux-c46cc9cee39bd6f395ab9ac98b1794705df13d7c.zip | |
scsi: ufs: ufs-pci: Add MCQ support for Intel UFS 4.0 controllers
The Intel UFS 4.0 PCI variant (PCI ID 8086:D335) advertises MCQ support
in its capability register. However, ufshcd_alloc_mcq() also requires an
.op_runtime_config hook to locate the per-queue operation and runtime
(OPR) register blocks, which was not provided by this variant operations
table.
As a result, MCQ initialization fails and ufshcd_add_scsi_host() prints
"MCQ mode is disabled, err=%d\n" before falling back to legacy
single-doorbell (SDB) mode.
Add ufs_intel_mcq_config_resource() to initialize the MCQ configuration
base and add ufs_intel_op_runtime_config() to set up the OPR register
offsets and stride.
Wire both hooks into the variant operations table so MCQ is enabled when
supported by the hardware.
Fixes: 096cd6b7adf2 ("scsi: ufs: ufs-pci: Add support for Intel Nova Lake")
Signed-off-by: sangram kumar yerra <sangram.k.y@intel.com>
Reviewed-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Link: https://patch.msgid.link/20260818112830.453402-3-sangram.k.y@intel.com
Signed-off-by: Martin K. Petersen (Oracle) <mkp@kernel.org>
Diffstat (limited to 'scripts/Makefile.thinlto')
0 files changed, 0 insertions, 0 deletions