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| author | Jack Yu <jack.yu@realtek.com> | 2026-09-09 16:54:49 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-09-14 00:34:33 +0100 |
| commit | d56fe35c1bce1f547eb600695f60c139a508ff6e (patch) | |
| tree | 806edfe2cba7d21796b6a986ba8aec1c665e83fb /scripts/Makefile.thinlto | |
| parent | 88c4aff39452d7f0ab59f13730182a43bc7257c6 (diff) | |
| download | linux-d56fe35c1bce1f547eb600695f60c139a508ff6e.tar.gz linux-d56fe35c1bce1f547eb600695f60c139a508ff6e.zip | |
ASoC: rt712-sdca: reconfigure PLL2 to fix calibration time-out
Add pll2 reconfiguration sequence in order to fix calibration
time-out issue and to support 24.576MHz MCLK on specific platforms.
Signed-off-by: Jack Yu <jack.yu@realtek.com>
Link: https://patch.msgid.link/20260909085449.862350-1-jack.yu@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'scripts/Makefile.thinlto')
0 files changed, 0 insertions, 0 deletions