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| author | Shahar Shitrit <shshitrit@nvidia.com> | 2026-09-02 19:46:32 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2026-09-05 13:14:48 -0700 |
| commit | 802eedcc0b25bb3e1b492f0600ab74325274d53b (patch) | |
| tree | 8ab641a3b6962cec7f372a8889ac7dfd6c1ccab0 /scripts/basic/split-include.c | |
| parent | e6662f2100f8d33b0f4d0047c219efd6bba186ea (diff) | |
| download | linux-802eedcc0b25bb3e1b492f0600ab74325274d53b.tar.gz linux-802eedcc0b25bb3e1b492f0600ab74325274d53b.zip | |
net/mlx5e: Fix missing FEC mode mapping for RS_544_514_INTERLEAVED_QUAD
MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD is missing from
pplm_fec_2_ethtool_linkmodes[], leaving index 4 zero-initialized.
As a result, when this FEC mode is active, find_first_bit() returns
index 4, causing __set_bit() to set bit 0
(ETHTOOL_LINK_MODE_10baseT_Half_BIT) instead of
ETHTOOL_LINK_MODE_FEC_RS_BIT. Consequently, ethtool reports:
Advertised FEC modes: Not reported
Add the missing mapping to ETHTOOL_LINK_MODE_FEC_RS_BIT.
Fixes: 4e343c11efbb ("net/mlx5e: Support FEC settings for 200G per lane link modes")
Signed-off-by: Shahar Shitrit <shshitrit@nvidia.com>
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Reviewed-by: Yael Chemla <ychemla@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260902164634.3657606-2-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'scripts/basic/split-include.c')
0 files changed, 0 insertions, 0 deletions