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| author | Richard Henderson <richard.henderson@linaro.org> | 2026-09-15 09:50:49 -1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2026-09-15 09:50:49 -1000 |
| commit | 28e7aad52202c7e6210e0e05d4f60360aaf8d027 (patch) | |
| tree | ea3817680f17ea8726d311652e0eb65f5becf093 /util/thread-context.c | |
| parent | 302c2f2df4d8b2eec81c38ee5d5b04e8e6e40d31 (diff) | |
| parent | 157f6c69edd0627f5f78f1f14ea0d831b0948c69 (diff) | |
| download | qemu-master.tar.gz qemu-master.zip | |
target-arm queue:
* target/arm/whpx: fix whpx-arm post-reset CPU state
* target/arm/whpx: incorrect ENCODE_AA64_CP_REG parameter order
* target/arm/whpx: Don't try to sync ARM_CP_CONST registers
* hw/intc/bcm2835_ic: reject out-of-range FIQ source values
* sbsa-gwdt: reschedule timer on direct WCV load
* target/arm/hvf: implement MDCCSR_EL0 as RAZ
* hw/char/stm32l4x5_usart: Accept character input upon RDR read
* MAINTAINERS: Update email address for Vikram Garhwal
* hw/misc/bcm2835_powermgt: free wdog timer on finalize
* target/arm: initialize SCTLR reset value for arm11mpcore
* target/arm: Fix various v6M corner-case bugs
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# gpg: Signature made Tue 15 Sep 2026 07:05:59 AM HST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [unknown]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20260915' of https://gitlab.com/pm215/qemu:
target/arm: extend PMSAv7 support to v6-M CPUs
target/arm: fix MPU SIZE min for v6-M/v7-M/v7-R
target/arm: MPU_RASR: mask TEX bits for Armv6-M
target/arm: MPU - limit regs RBAR/RASR A1-A3 to Main Extension
target/arm: enforce Armv6-M NVIC limits
target/arm: initialize SCTLR reset value for arm11mpcore
hw/misc/bcm2835_powermgt: free wdog timer on finalize
MAINTAINERS: Update email address for Vikram Garhwal
hw/char/stm32l4x5_usart: Accept character input upon RDR read
target/arm/hvf: implement MDCCSR_EL0 as RAZ
sbsa-gwdt: reschedule timer on direct WCV load
sbsa-gwdt: don't arm timer for compare values above INT64_MAX
sbsa-gwdt: rename sbsa_gwdt_update_timer() to sbsa_gwdt_wor_update_timer()
arm: gwdt: simplify WCV update condition
arm: gwdt: consolidate clear WS0 and WS1 on explicit refresh
sbsa-gwdt: reduce code indent
hw/intc/bcm2835_ic: reject out-of-range FIQ source values
target/arm/whpx: fix whpx-arm post-reset CPU state
target/arm/whpx: incorrect ENCODE_AA64_CP_REG parameter order
target/arm/whpx: Don't try to sync ARM_CP_CONST registers
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'util/thread-context.c')
0 files changed, 0 insertions, 0 deletions