summaryrefslogtreecommitdiff
path: root/host
AgeCommit message (Expand)Author
2026-08-18util/cpuinfo-aarch64: Detect FEAT_CSSCRichard Henderson
2026-08-18util/cpuinfo-riscv: Detect ZbkbRichard Henderson
2026-01-17meson: Drop host_arch rename for riscv64Richard Henderson
2026-01-17*: Remove ppc host supportRichard Henderson
2026-01-17host/include/x86_64/bufferiszero: Remove no SSE2 fallbackRichard Henderson
2026-01-17*: Remove i386 host supportRichard Henderson
2025-12-05include/aarch64/host: Fix atomic16_fetch_{and,or}Richard Henderson
2025-12-05include/generic/host: Fix atomic128-cas.h.inc for Int128 structureRichard Henderson
2025-09-04cpuinfo/i386: Detect GFNI as an AVX extensionRichard Henderson
2025-08-30qemu/atomic: Add atomic16 primitives for xchg, fetch_and, fetch_orRichard Henderson
2025-08-30qemu/atomic: Finish renaming atomic128-cas.h headersRichard Henderson
2025-03-21host/include/loongarch64: Fix inline assembly compatibility with ClangYao Zi
2025-03-08qemu/atomic: Rename atomic128-ldst.h headers using .h.inc suffixPhilippe Mathieu-Daudé
2025-03-08qemu/atomic: Rename atomic128-cas.h headers using .h.inc suffixPhilippe Mathieu-Daudé
2025-01-16util/cpuinfo-riscv: Detect ZbsRichard Henderson
2024-10-31target/i386/hvf: fix handling of XSAVE-related CPUID bitsPaolo Bonzini
2024-10-22util: Add RISC-V vector extension probe in cpuinfoTANG Tiancheng
2024-07-03util/cpuinfo-riscv: Support host/cpuinfo.h for riscvRichard Henderson
2024-06-28Revert "host/i386: assume presence of SSE2"Paolo Bonzini
2024-06-28Revert "host/i386: assume presence of POPCNT"Paolo Bonzini
2024-06-19util/bufferiszero: Add loongarch64 vector accelerationRichard Henderson
2024-06-19util/bufferiszero: Split out host include filesRichard Henderson
2024-06-19util/loongarch64: Detect LASX vector supportRichard Henderson
2024-06-05host/i386: assume presence of POPCNTPaolo Bonzini
2024-06-05host/i386: assume presence of SSE2Paolo Bonzini
2024-06-05host/i386: assume presence of CMOVPaolo Bonzini
2024-06-05host/i386: nothing looks at CPUINFO_SSE4Paolo Bonzini
2024-04-26accel/tcg: Rename load-extract/store-insert headers using .h.inc suffixPhilippe Mathieu-Daudé
2023-11-13host/include/generic/host/atomic128: Fix compilation problem with Clang 17Thomas Huth
2023-11-06host/include/loongarch64: Add atomic16 load and storeRichard Henderson
2023-11-06util: Add cpuinfo for loongarch64Richard Henderson
2023-09-20i386: spelling fixesMichael Tokarev
2023-09-20ppc: spelling fixesMichael Tokarev
2023-09-19Merge tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi
2023-09-16util/cpuinfo-aarch64: Add CPUINFO_BTIRichard Henderson
2023-09-15host/include/aarch64: Implement clmul.hRichard Henderson
2023-09-15host/include/i386: Implement clmul.hRichard Henderson
2023-09-15crypto: Add generic 64-bit carry-less multiply routineRichard Henderson
2023-07-25other architectures: spelling fixesMichael Tokarev
2023-07-25arm: spelling fixesMichael Tokarev
2023-07-08host/include/ppc: Implement aes-round.hRichard Henderson
2023-07-08host/include/aarch64: Implement aes-round.hRichard Henderson
2023-07-08host/include/i386: Implement aes-round.hRichard Henderson
2023-07-08crypto: Add aesdec_ISB_ISR_AK_IMCRichard Henderson
2023-07-08crypto: Add aesdec_ISB_ISR_IMC_AKRichard Henderson
2023-07-08crypto: Add aesenc_SB_SR_MC_AKRichard Henderson
2023-07-08crypto: Add aesdec_IMCRichard Henderson
2023-07-08crypto: Add aesenc_MCRichard Henderson
2023-07-08crypto: Add aesdec_ISB_ISR_AKRichard Henderson
2023-07-08crypto: Add aesenc_SB_SR_AKRichard Henderson
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-08 08:39:13 +0000