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path: root/drivers/soc/qcom
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3 dayssoc: qcom: ubwcg: Add Nord UBWC configGourav Kumar
Map qcom,nord to glymur_data in qcom_ubwc_configs[], since Nord shares Glymur's UBWC capabilities. Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260903014309.314962-1-shengchao.guo@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
10 dayssoc: qcom: smp2p: fix __iomem annotation on entry->value pointerBen Dooks
The entry->value is passed to readl() so should be marked __iomem so remove these sparse warnings by marking it __iomem and do the relevant casting to ensure no further warnings: drivers/soc/qcom/smp2p.c:280:64: warning: incorrect type in argument 1 (different address spaces) drivers/soc/qcom/smp2p.c:280:64: expected void const volatile [noderef] __iomem *addr drivers/soc/qcom/smp2p.c:280:64: got unsigned int [usertype] *value drivers/soc/qcom/smp2p.c:318:34: warning: incorrect type in argument 1 (different address spaces) drivers/soc/qcom/smp2p.c:318:34: expected void const volatile [noderef] __iomem *addr drivers/soc/qcom/smp2p.c:318:34: got unsigned int [usertype] *value drivers/soc/qcom/smp2p.c:446:26: warning: incorrect type in argument 1 (different address spaces) drivers/soc/qcom/smp2p.c:446:26: expected void const volatile [noderef] __iomem *addr drivers/soc/qcom/smp2p.c:446:26: got unsigned int [usertype] *value drivers/soc/qcom/smp2p.c:501:33: warning: incorrect type in argument 1 (different address spaces) drivers/soc/qcom/smp2p.c:501:33: expected void const volatile [noderef] __iomem *addr drivers/soc/qcom/smp2p.c:501:33: got unsigned int [usertype] *value drivers/soc/qcom/smp2p.c:504:26: warning: incorrect type in argument 2 (different address spaces) drivers/soc/qcom/smp2p.c:504:26: expected void volatile [noderef] __iomem *addr drivers/soc/qcom/smp2p.c:504:26: got unsigned int [usertype] *value Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lore.kernel.org/r/20260623085931.589735-1-ben.dooks@codethink.co.uk Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: apr: clean up failed service registrationsHongyan Xu
apr_add_device() publishes a service in svcs_idr before parsing the optional protection domain and registering the device. If device registration fails, put_device() frees the apr_device while its service remains in the IDR. A received packet can then dereference that stale entry. The property error path also leaves the service and allocation behind. Split device_register() into device_initialize() and device_add() so every pre-registration error can safely drop the device reference. Remove the service from the IDR on all failures after publication, then drain the RX workqueue before dropping the device reference. This prevents an in-flight lookup from outliving the device. Fixes: 6adba21eb434 ("soc: qcom: Add APR bus driver") Signed-off-by: Hongyan Xu <getshell@seu.edu.cn> Link: https://lore.kernel.org/r/20260806060541.820-1-getshell@seu.edu.cn Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: smem: Fix signedness bug in smem_dram_parse()Dan Carpenter
The "ver" variable is type "enum ddr_info_version". Enum types are dependent on the compiler but in practical terms here, "ver" is basically an unsigned int. It needs to be signed for the -EINVAL to be handled correctly. Fixes: 1d234eeafc56 ("soc: qcom: smem: Expose DDR data from SMEM") Signed-off-by: Dan Carpenter <error27@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/an1toQ-acGR0kOWj@stanley.mountain Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: ubwc: Add configuration for MailiWangao Wang
Describe the Universal Bandwidth Compression (UBWC) configuration for the Maili platform. Maili reuses the hawi UBWC configuration. Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260812-ubwc_for_hawi_maili-v1-2-c29edecb3bd8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: ubwc: Add configuration for HawiWangao Wang
Add UBWC configuration data for the Hawi platform, which uses UBWC 7.0 and enables the required flags and highest bank bit settings. This allows drivers to query the correct UBWC capabilities on Hawi. Also add UBWC 7.0 support to the version tag helper so that qcom_ubwc_version_tag() returns the correct tag for UBWC 7.0. Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260812-ubwc_for_hawi_maili-v1-1-c29edecb3bd8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: rpmh-rsc: fix kernel-doc issues in rpmh-rsc.cMaulik Shah
Two documentation issues in rpmh-rsc.c: - rpmh_rsc_pd_callback() has a copy-paste title 'Check if any of the AMCs are busy' which describes rpmh_rsc_ctrlr_is_busy() not this function. Fix the title to accurately describe what this callback does: flush sleep/wake TCS data on PM domain power-off. - rpmh_rsc_cpu_pm_callback() has the same copy-paste title 'Check if any of the AMCs are busy'. Fix the title to accurately describe what this callback does: flush sleep/wake TCS data when all CPUs enter power down. No functional impact. Assisted-by: Claude:claude-sonnet-5 Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-3-0f5026293d9a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: rpmh: fix kernel-doc issues in rpmh.cMaulik Shah
Six documentation issues in rpmh.c: - struct batch_cache_req has a typo in its title: 'batch catch' should be 'batch cache'. Fix it. - __rpmh_write(), rpmh_write_async(), rpmh_write(), rpmh_write_batch() and rpmh_invalidate() use 'name: title' format instead of the 'name() - title' format documented in Documentation/doc-guide/kernel-doc.rst. Fix all of them. - rpmh_tx_done() has no kernel-doc comment. Add one describing its purpose as the RSC driver callback for active-only transfer completion. - __rpmh_write(), rpmh_write_async(), rpmh_write() and rpmh_write_batch() are missing Return: tags. Add them. - struct cache_req uses 'struct name:' format instead of the 'struct name -' format documented in Documentation/doc-guide/kernel-doc.rst. Fix it. - rpmh_write_batch() has an inaccurate description: it says requests are sent 'without caching' and that SLEEP/WAKE_ONLY requests are sent as fire-and-forget. In reality, SLEEP/WAKE_ONLY requests are cached in batch_cache and returned immediately; they are only sent to the controller later by rpmh_flush(). Fix the description. No functional impact. Assisted-by: Claude:claude-sonnet-5 Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-2-0f5026293d9a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: rpmh-internal: fix kernel-doc issues in rpmh-internal.hMaulik Shah
kernel-doc emits two warnings for rpmh-internal.h: Warning: drivers/soc/qcom/rpmh-internal.h:136 struct member 'ver' not described in 'rsc_drv' Warning: drivers/soc/qcom/rpmh-internal.h:136 struct member 'regs' not described in 'rsc_drv' Fix them by adding @ver and @regs entries to the struct rsc_drv documentation. While at it, add a missing kernel-doc block for struct rsc_ver, and update the remaining struct kernel-doc comments (struct tcs_group, struct rpmh_request, struct rpmh_ctrlr, struct rsc_drv) to use the 'struct name -' format documented in Documentation/doc-guide/kernel-doc.rst. No functional impact. Assisted-by: Claude:claude-sonnet-5 Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-1-0f5026293d9a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: pmic_glink: Fix device access from worker during suspendAbel Vesa
For historical reasons, the GLINK smem interrupt is registered with IRRQF_NO_SUSPEND flag set, which is the underlying problem here, since the incoming messages can be delivered during late suspend and early resume. In this specific case, the pmic_glink_altmode_worker() currently gets scheduled on the system_wq which can be scheduled to run while devices are still suspended. This proves to be a problem when a Type-C retimer, switch or mux that is controlled over a bus like I2C, because the I2C controller is suspended. This has been proven to be the case on the X Elite boards where such retimers (ParadeTech PS8830) are used in order to handle Type-C orientation and altmode configuration. The following warning is thrown: [ 35.134876] i2c i2c-4: Transfer while suspended [ 35.143865] WARNING: CPU: 0 PID: 99 at drivers/i2c/i2c-core.h:56 __i2c_transfer+0xb4/0x57c [i2c_core] [ 35.352879] Workqueue: events pmic_glink_altmode_worker [pmic_glink_altmode] [ 35.360179] pstate: 61400005 (nZCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--) [ 35.455242] Call trace: [ 35.457826] __i2c_transfer+0xb4/0x57c [i2c_core] (P) [ 35.463086] i2c_transfer+0x98/0xf0 [i2c_core] [ 35.467713] i2c_transfer_buffer_flags+0x54/0x88 [i2c_core] [ 35.473502] regmap_i2c_write+0x20/0x48 [regmap_i2c] [ 35.478659] _regmap_raw_write_impl+0x780/0x944 [ 35.483401] _regmap_bus_raw_write+0x60/0x7c [ 35.487848] _regmap_write+0x134/0x184 [ 35.491773] regmap_write+0x54/0x78 [ 35.495418] ps883x_set+0x58/0xec [ps883x] [ 35.499688] ps883x_sw_set+0x60/0x84 [ps883x] [ 35.504223] typec_switch_set+0x48/0x74 [typec] [ 35.508952] pmic_glink_altmode_worker+0x44/0x1fc [pmic_glink_altmode] [ 35.515712] process_scheduled_works+0x1a0/0x2d0 [ 35.520525] worker_thread+0x2a8/0x3c8 [ 35.524449] kthread+0xfc/0x184 [ 35.527749] ret_from_fork+0x10/0x20 The proper solution here should be to not deliver these kind of messages during system suspend at all, or at least make it configurable per glink client. But simply dropping the IRQF_NO_SUSPEND flag entirely will break other clients. The final shape of the rework of the pmic glink driver in order to fulfill both the filtering of the messages that need to be able to wake-up the system and the queueing of these messages until the system has properly resumed is still being discussed and it is planned as a future effort. Meanwhile, the stop-gap fix here is to schedule the pmic glink altmode worker on the system_freezable_wq instead of the system_wq. This will result in the altmode worker not being scheduled to run until the devices are resumed first, which will give the controllers like I2C a chance to resume before the transfer is requested. Reported-by: Johan Hovold <johan+linaro@kernel.org> Closes: https://lore.kernel.org/lkml/Z1CCVjEZMQ6hJ-wK@hovoldconsulting.com/ Fixes: 080b4e24852b ("soc: qcom: pmic_glink: Introduce altmode support") Cc: stable@vger.kernel.org # 6.3 Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260819-b4-soc-qcom-pmic-glink-fix-device-access-on-worker-while-suspended-v3-1-169b00e0d9d4@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: llcc-qcom: Handle errors from optional IRQ lookupbui duc phuc
platform_get_irq_optional() returns a positive IRQ number on success or a negative error code on failure. For an optional IRQ, -ENXIO indicates that no optional IRQ is available. Other errors, such as -EPROBE_DEFER and -EINVAL, should be propagated so that the caller can handle them appropriately. Propagate negative errors other than -ENXIO. Signed-off-by: bui duc phuc <phucduc.bui@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260819102630.68991-1-phucduc.bui@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: geni-se: Fix write to read-only firmware bufferViken Dadhaniya
geni_find_protocol_fw() casts fw->data to a non-const struct se_fw_hdr pointer and writes back the rounded-up fw_size value: sefw->fw_size_in_items = cpu_to_le16(fw_size); The firmware subsystem maps the firmware blob read-only. Writing through the cast pointer causes a level-3 permission fault on AArch64 and crashes the kernel during driver probe. The write-back is no longer necessary: geni_find_protocol_fw() now propagates the rounded size to the caller via fw_size_out. Remove the write-back and make sefw (and the hdr pointer in the caller) const-correct. Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem") Cc: stable@vger.kernel.org Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-4-43e6a3abd651@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: geni-se: Fix fw_end computed before round-up; propagate size to ↵Viken Dadhaniya
caller fw_end was computed from the raw fw_size_in_items, before the odd-word round-up. A segment with an odd word count could pass the bounds check at the unrounded value but then be copied one word past the validated limit. Move fw_end (and the cfg_{idx,val}_end) calculations to after the round-up so they always reflect the true copy extent. The caller geni_load_se_fw() re-read hdr->fw_size_in_items for the memcpy_toio() length, bypassing the validated and rounded value established by geni_find_protocol_fw(). Add a fw_size_out output parameter and use it in the caller. Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem") Cc: stable@vger.kernel.org Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-3-43e6a3abd651@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: geni-se: Widen fw_size to u32 to prevent wrap-aroundViken Dadhaniya
fw_size is read from the 16-bit fw_size_in_items field and incremented when the count is odd. If fw_size_in_items == 0xffff the increment wraps to 0 as a u16, making the bounds check below pass for a firmware segment whose actual size was not validated. Widen fw_size to u32 so the increment never wraps. Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem") Cc: stable@vger.kernel.org Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-2-43e6a3abd651@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: geni-se: Fix endian conversion for serial_protocol comparisonViken Dadhaniya
serial_protocol is declared as __le16 in struct se_fw_hdr, but was decoded with le32_to_cpu(). On big-endian systems the extra byte swap causes the field to always compare unequal to the protocol argument, so no firmware segment is ever selected. Use le16_to_cpu() to match the field width. Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem") Cc: stable@vger.kernel.org Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-1-43e6a3abd651@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: socinfo: Add SM7250 SoC IDSreeshankar K
Add SoC ID for Qualcomm SM7250 SoC. Signed-off-by: Sreeshankar K <sreeshankar0910@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260824150156.1310-3-sreeshankar0910@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: geni-se: allow selection on 32-bit ARM Qualcomm SoCsHardeep Sharma
Kuno, a 32-bit ARM Cortex-A7 Qualcomm SoC, uses the GENI-based QUP wrapper for its debug UART. Drop the explicit ARM64 dependency so the driver can be selected on 32-bit ARM as well; QCOM_GENI_SE already sits under the QCOM_SOC menuconfig, which is gated by ARCH_QCOM || COMPILE_TEST, so no replacement dependency is needed. Acked-by: Mukesh Savaliya <mukesh.savaliya@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Signed-off-by: Hardeep Sharma <hardeep.sharma@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260827-kuno-soc-support-v5-1-6d47636a8f09@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: Remove redundant dev_err()Pan Chuang
Since commit 55b48e23f5c4 ("genirq/devres: Add error handling in devm_request_*_irq()"), devm_request_irq() and devm_request_threaded_irq() automatically log detailed error messages on failure. Remove the now-redundant driver-specific dev_err() calls. Signed-off-by: Pan Chuang <panchuang@vivo.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260723024248.17480-1-panchuang@vivo.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: apr: Drop unused apr_device_idUwe Kleine-König (The Capable Hub)
apr_device_id was introduced in commit 6adba21eb434 ("soc: qcom: Add APR bus driver") in 2018, and since then not a single driver made use of it. So drop the unused id_table pointer from struct apr_driver and move APR_NAME_SIZE to the apr header which still has a usage of it. Note that with the id_table being NULL apr_device_match() degrades to just of_driver_match_device(), so replace this callback accordingly. Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Link: https://lore.kernel.org/r/e8b352f33ae38df3616dc157c1cafd13d49c5e3e.1784554037.git.u.kleine-koenig@baylibre.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: smsm: fix __iomem annotationsBen Dooks
There are a number of points in the driver which miss out on __iomem annotations, so add these to remove the following sparse warnings: drivers/soc/qcom/smsm.c:159:32: warning: incorrect type in argument 1 (different address spaces) drivers/soc/qcom/smsm.c:159:32: expected void const volatile [noderef] __iomem *addr drivers/soc/qcom/smsm.c:159:32: got unsigned int [usertype] *local_state drivers/soc/qcom/smsm.c:171:25: warning: incorrect type in argument 2 (different address spaces) drivers/soc/qcom/smsm.c:171:25: expected void volatile [noderef] __iomem *addr drivers/soc/qcom/smsm.c:171:25: got unsigned int [usertype] *local_state drivers/soc/qcom/smsm.c:181:48: warning: incorrect type in argument 1 (different address spaces) drivers/soc/qcom/smsm.c:181:48: expected void const volatile [noderef] __iomem *addr drivers/soc/qcom/smsm.c:181:48: got unsigned int [usertype] * drivers/soc/qcom/smsm.c:219:26: warning: incorrect type in argument 1 (different address spaces) drivers/soc/qcom/smsm.c:219:26: expected void const volatile [noderef] __iomem *addr drivers/soc/qcom/smsm.c:219:26: got unsigned int [usertype] *remote_state drivers/soc/qcom/smsm.c:257:49: warning: incorrect type in argument 1 (different address spaces) drivers/soc/qcom/smsm.c:257:49: expected void const volatile [noderef] __iomem *addr drivers/soc/qcom/smsm.c:257:49: got unsigned int [usertype] * drivers/soc/qcom/smsm.c:259:49: warning: incorrect type in argument 2 (different address spaces) drivers/soc/qcom/smsm.c:259:49: expected void volatile [noderef] __iomem *addr drivers/soc/qcom/smsm.c:259:49: got unsigned int [usertype] * drivers/soc/qcom/smsm.c:280:24: warning: incorrect type in argument 1 (different address spaces) drivers/soc/qcom/smsm.c:280:24: expected void const volatile [noderef] __iomem *addr drivers/soc/qcom/smsm.c:280:24: got unsigned int [usertype] *remote_state drivers/soc/qcom/smsm.c:288:49: warning: incorrect type in argument 1 (different address spaces) drivers/soc/qcom/smsm.c:288:49: expected void const volatile [noderef] __iomem *addr drivers/soc/qcom/smsm.c:288:49: got unsigned int [usertype] * drivers/soc/qcom/smsm.c:290:49: warning: incorrect type in argument 2 (different address spaces) drivers/soc/qcom/smsm.c:290:49: expected void volatile [noderef] __iomem *addr drivers/soc/qcom/smsm.c:290:49: got unsigned int [usertype] * drivers/soc/qcom/smsm.c:330:26: warning: incorrect type in argument 1 (different address spaces) drivers/soc/qcom/smsm.c:330:26: expected void const volatile [noderef] __iomem *addr drivers/soc/qcom/smsm.c:330:26: got unsigned int [usertype] *remote_state drivers/soc/qcom/smsm.c:635:47: warning: incorrect type in argument 2 (different address spaces) drivers/soc/qcom/smsm.c:635:47: expected void volatile [noderef] __iomem *addr drivers/soc/qcom/smsm.c:635:47: got unsigned int [usertype] * Note, we don't fixup the qcom_smem_get() to return an __iomem annotated pointer. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lore.kernel.org/r/20260623090954.620688-1-ben.dooks@codethink.co.uk Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: llcc: Update the SCT table for IPQ5424Kathiravan Thirumoorthy
Update the IPQ5424 LLCC slice configuration table to give the PPE and Wi-Fi datapaths dedicated slices. Assign slice IDs 1 and 5 to the PPE RX descriptor and RX fill use cases, slice IDs 6 and 7 to the Wi-Fi radios connected over PCIe, and slice ID 2 to the CPU subsystem. Adjust the corresponding capacities, priorities, and way masks for these consumers. These slice assignments are based on recommendations from the performance team, following throughput measurements on IPQ5424. Having the dedicated slice configuration for each of these use cases helps to improve the networking throughput by more than 1 Gbps. Rename the usecase IDs for slice IDs 1 and 2 because LLCC_CPUSS and LLCC_VIDSC0 do not describe the actual users of those slices. Assisted-by: LLM Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260819-ipq5424_llcc_updates-v3-1-42b48451481d@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: smem: support Glymur DRAM infoKonrad Dybcio
Glymur firmware provides a version 7 DDR-info SMEM entry whose 872-byte layout is different from the one the driver supports today. The data contains 16 channel descriptors, 14 DDR frequency slots, four 4 DDR region slots, a 10-entry SHUB frequency plan, and v6 misc information. It accounts for 616 bytes; the captured SMEM entry has a further 256 zero bytes. Add a Glymur-specific version 7 layout and recognize that complete entry. Parse the DDR frequencies and highest-bank bit from the common fields. Assisted-by: LLM Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260820-topic-glymur_dramc-v1-1-f714eef34e4d@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: smem: Fix byte order in v3 14-frequency parserLinmao Li
smem_dram_parse_v3_14freqs_data() uses the little-endian freq_khz field directly when scaling the frequency from kHz to Hz. This produces byte-swapped values on big-endian systems. Convert freq_khz to CPU byte order before using it, as the other DDR data parsers do. Fixes: 1d234eeafc56 ("soc: qcom: smem: Expose DDR data from SMEM") Signed-off-by: Linmao Li <lilinmao@kylinos.cn> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260827020447.2642830-1-lilinmao@kylinos.cn Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 dayssoc: qcom: smem: fix 32-bit overflow in DDR frequency calculationGopikrishna Garmidi
The DDR frequency in SMEM is reported in kHz and converted to Hz by multiplying it by 1000. Since the SMEM frequency value is a u32, using an unsuffixed integer constant causes the multiplication to be performed with 32-bit arithmetic. This overflows for DDR frequencies above 4294967 kHz, resulting in an incorrect frequency being reported through the SMEM DRAM interface. Use an unsigned long constant for the multiplication so the calculation is performed with 64-bit arithmetic on the supported Qualcomm platforms. Apply the fix consistently to the v3, v3.1, v4, v5, and v7 SMEM parsers. Fixes: 1d234eeafc56 ("soc: qcom: smem: Expose DDR data from SMEM") Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260827-glymur_dramc-v1-1-eba358d504b8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-08-25Merge tag 'rproc-v7.3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux Pull remoteproc updates from Bjorn Andersson: "Add a remoteproc driver and binding for AMD MicroBlaze/V soft cores executing from dual-port BRAM, with clock and reset control and support for firmware without a resource table. Introduce a generic Qualcomm PAS service with SCM and OP-TEE backends, and migrate the PAS, MSS, and WCNSS remoteproc drivers to it. Add Nord ADSP and CDSP support, Eliza CDSP support, Maili ADSP/CDSP bindings, and late-attach SoCCP support for Kaanapali, Hawi, Maili, and Glymur. Enable BAM-DMUX child devices for PAS modems and fix PAS memory protection, handover, shutdown, and resource lifetime handling. Harden remoteproc lifecycle handling by attaching asynchronously, stopping crashed processors, synchronizing crash work with removal, and forcing shutdown before device resources are released. Reallocate resources during attach recovery and fix several reference and error-path leaks. Add Xilinx R5 crash detection and move RPU start and stop sequencing into the platform firmware driver. Consolidate write-combining carveout mapping callbacks, use correct I/O-memory accessors, and share optional ELF resource-table handling across drivers. Convert the TI Wakeup M3 binding to DT schema, correct Qualcomm and generic remoteproc bindings, and harden resource-table iteration against signed-offset out-of-bounds accesses" * tag 'rproc-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (60 commits) remoteproc: fix OOB read via signed offset in rsc_table_for_each_entry() remoteproc: replace BSD blurb with SPDX identifier in rsc_table.h remoteproc: replace BSD blurb with SPDX identifier in remoteproc.h remoteproc: fix coding style issues in remoteproc.h MAINTAINERS: add rsc_table.h to remoteproc entry remoteproc: qcom: pas: Add Nord ADSP and CDSP support dt-bindings: remoteproc: qcom,nord-pas: Document Nord PAS remoteproc: qcom: pas: Drop unused dtb_mem_region field remoteproc: qcom: pas: Map/unmap subsystem region before auth_and_reset remoteproc: qcom: pas: Fix the PAS context creation placement remoteproc: qcom: pas: Guard dtb metadata release with dtb_pas_id check remoteproc: qcom: annotate mem_region fields with __iomem arm64: dts: qcom: eliza: Add fallback compatible for ADSP remoteproc dt-bindings: remoteproc: qcom,milos-pas: Move Eliza ADSP to SM8550 schema remoteproc: qcom: pas: Add Eliza CDSP support dt-bindings: remoteproc: qcom,sm8550-pas: Add Eliza CDSP compatible remoteproc: qcom: q6v5: Request shutdown if crash is triggered host-side remoteproc: Force shutdown during device removal remoteproc: Prevent crash handling to race with rproc_del() remoteproc: Allow shutdown of crashed processors ...
2026-08-19Merge tag 'spi-v7.3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "Along with a lot of driver specific work we've got a couple of core features here. The bigger one is that we've now got support for instantiating devices from sysfs similarly to how it's already done for I2C, this is used with development boards with non-enumerable expansion headers since SPI devices need to be manually specified. We also have support for the DQS signal on higher end flash devices. - Support for instantiating devices from sysfs, useful for development boards with non-enumerable plugin modules, from Vishwaroop A. - Support for DQS in spi-mem, an additional signal used by flash devices to avoid clock skew from Miquel Raynal. - Support for more advanced SPI modes on DesignWare controllers from Sudip Mukherjee. - Changes from Jisheng Zhang to update to modern methods of specifying the PM callbacks. - Fixes for DMA mapping error handling, plus KUnit tests for this, from Honghui Jiang. - Substantial cleanup and performance work in the nxp-spi driver. - Support for Microchip LAN969x, Nuvoton MA35D1 QSPI, Qualcomm SA8255p and SA8797P, and StarFive JHB100 SFC" * tag 'spi-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (132 commits) spi: Add KUnit coverage for DMA mapping error paths spi: Clear current DMA devices when unmapping a message spi: Move __spi_unmap_msg() before __spi_map_msg() spi: Fix DMA mapping ownership on partial map failure spi: dt-bindings: sun6i: Add compatibles for A733's SPI controllers spi: ma35d1-qspi: Use the existing update helper spi: ma35d1-qspi: Add DTR support spi: ma35d1-qspi: Allow several command bytes spi: ma35d1-qspi: Move speed setting to bus configuration spi: ma35d1-qspi: Remove redundant reset operation spi: dw: Remove shadowed dws in dw_spi_setup() spi: img-spfi: don't disable runtime PM on DMA deferred probe spi: mtk-nor: Propagate errors from IRQ request spi: mtk-nor: Propagate errors from optional IRQ lookup spi: spi-qpic-snand: Handle Macronix quad read opcode 0x6b spi: spi-qpic-snand: add quad mode support spi: spi-qpic-snand: move command mapping helper spi: hisi-sfc-v3xx: Propagate errors from optional IRQ lookup spi: meson-spifc: use devm_pm_runtime_set_active_enabled spi: sprd-adi: Fix probe succeeding without registering the controller ...
2026-08-19Merge tag 'regulator-v7.3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator Pull regulator updates from Mark Brown: "This is a relatively quiet release for the regulator API, we've had no major core work and not really that much driver work either. There's a bunch of activity, including several new devices, but nothing hugely remarkable here. - Reworking of the mode handling in the max14577 driver to fix issues with collisions with enables - Support for onsemi FAN53555BUC23X, Qualcomm IPQ9650, PM4125 VBUS and PM8150B and Unisoc SC2730" * tag 'regulator-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (36 commits) regulator: fan53555: Add support for FAN53555BUC23X type regulator: qcom-rpmh: Fix coding style issues regulator: qcom-rpmh: readback voltage/bypass/mode set during bootup regulator: qcom-rpmh: Fix PMIC5 BOB bypass mode handling soc: qcom: rpmh: Add support to read back resource settings regulator: dt-bindings: ti,pbias-omap: Convert to DT schema regulator: ab8500: Remove stale expand_register kernel-doc entry regulator: dt-bindings: Correct white-space style regulator: pfuze100: add set_suspend_disable for LDO ops regulator: core: use system_freezable_wq for init complete work regulator: rt6245: Restore state on enable failure regulator: tps65185: handle gpiod_get_value_cansleep() error returns regulator: fan53555: Add support for mode operations on Silergy devices regulator: dt-bindings: Add fan53555 allowed modes regulator: wm831x-isink: remove conditional return with no effect regulator: dt-bindings: Convert ltc3589.txt to yaml format regulator: dt-bindings: tps51632: Convert to DT schema regulator: mcp16502: Convert to dev_err_probe() in mcp16502_probe() regulator: adp5055: Fix error code in adp5055_of_parse_cb() regulator: qcom_usb_vbus: add support for qcom,pm4125-vbus-reg ...
2026-08-18soc: qcom: make QCOM_PDR_MSG selectableArnd Bergmann
Selecting QCOM_PDR_HELPERS from outside of a CONFIG_QCOM_SOC block causes a build warning: WARNING: unmet direct dependencies detected for QCOM_PDR_MSG Depends on [n]: QCOM_SOC [=n] Selected by [y]: - QCOM_PDR_HELPERS [=y] && NET [=y] Avoid this by allowing QCOM_PDR_MSG to be selected as well. Fixes: f2866e6a27f7 ("soc: qcom: Hide all drivers behind selectable menu") Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-08-18soc: qcom: ubwc: Fix link error when QCOM_SMEM=nDaniel Baluta
ubwc_config.c calls qcom_smem_is_available() and qcom_smem_dram_get_hbb() unconditionally, so QCOM_UBWC_CONFIG=y with QCOM_SMEM=n fails to link: arm-linux-gnueabihf-ld: ubwc_config.c:(.text+0x2c): undefined reference to 'qcom_smem_is_available' Add the missing 'depends on QCOM_SMEM'. Fixes: 1b445022d1d0 ("soc: qcom: ubwc: Get HBB from SMEM") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Tested-by: Nathan Chancellor <nathan@kernel.org> # build Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-08-10Merge tag 'qcom-drivers-for-7.3-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers More Qualcomm driver updates for v7.3 Add SMEM parsing for DDR configuration data and use its highest bank address bit to select the appropriate UBWC configuration. Enable generic PAS trusted-zone APIs for the Iris and Venus media drivers. Fix SCM probe retry state, reserved-memory cleanup, and an early IRQ-handler NULL dereference. Enable QSEECOM EFI variable access on the Asus Zenbook A16. Correct GENI firmware-size validation using the hardware CFG RAM depth and correct the PMIC GLINK Thunderbolt extradata layout. Document the Nord AOSS side channel and the IMEM minidump SRAM property. Clean up Qualcomm statistics macros and the WCNSS binding schema. * tag 'qcom-drivers-for-7.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: media: qcom: Switch to generic PAS TZ APIs dt-bindings: soc: qcom,aoss-qmp: Document Nord AOSS side channel dt-bindings: sram: qcom,imem: Add minidump-sram pattern property soc: qcom: qcom_stats: Replace CLIENT_VOTES_OFFSET macro with sizeof() soc: qcom: qcom_stats: Remove unused macro definitions soc: qcom: ubwc: Get HBB from SMEM soc: qcom: smem: Expose DDR data from SMEM soc: qcom: smem: Use 'unsigned int' instead of 'unsigned' firmware: qcom: scm: Fix tzmem state on probe retry firmware: qcom: scm: Fix reserved memory cleanup on probe failure firmware: qcom: scm: Fix NULL dereference in IRQ handler before __scm is published firmware: qcom: scm: Allow QSEECOM on Asus Zenbook A16 (UX3607OA) soc: qcom: geni-se: Use HW PROG_RAM_DEPTH to validate firmware size soc: qcom: pmic_glink_altmode: Define the TBT extradata properly dt-bindings: soc: qcom,wcnss: Drop redundant $ref of firmware-name property Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-08-07soc: qcom: rpmh: Add support to read back resource settingsMaulik Shah
All rpmh_*() APIs so far have supported placing votes for various resource settings but the H/W also have option to read resource settings. Add new rpmh_read() API to allow clients to read back resource setting from H/W. This will be useful for clients like regulators, which currently don't have a way to know the settings applied during bootloader stage. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Signed-off-by: Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com> Link: https://patch.msgid.link/20260801-b4-read-rpmh-v5-v6-1-9fcb54928523@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04Merge tag 'qcom-drivers-for-7.3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v7.3 Add Maili platform bindings for SCM, IMEM, AOSS, and PMIC GLINK. Add Shikra IMEM, RPM SMD, LLCC, and UBWC support, including handling for firmware-configured LLCC ECC interrupts. Add the generic Peripheral Authentication Service with SCM and OP-TEE backends, and migrate the MSM DRM and IPA drivers to it. Add SCM SMC-call tracepoints and configurable minidump delivery through always-on SRAM. Correct SCM download-mode pointer ordering and improve download-mode probe diagnostics. Rework the UBWC configuration database and add Milos and Shikra configuration. Add protection-domain mappings for SA8775P and QCS8300, support newer ICE versions, Hawi subsystem statistics, and SDM850 identification. Simplify Qualcomm SoC Kconfig selection and architecture dependencies. Use managed resources in EBI2 and RPMh RSC probe paths to correct cleanup on failures. * tag 'qcom-drivers-for-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (44 commits) soc: qcom: llcc: Skip ECC interrupt setup on Shikra, pre-configured by DSF dt-bindings: sram: Document qcom,shikra-imem compatible net: ipa: Switch to generic PAS TZ APIs firmware: qcom: scm: Add minidump SRAM support firmware: qcom: scm: use dev_err_probe() for dload address failure firmware: qcom: scm: Fix missing smp_load_acquire() dt-bindings: firmware: qcom,scm: Add minidump SRAM property drm/msm: Switch to generic PAS TZ APIs bus: qcom-ebi2: use managed resources for clocks and children soc: qcom: rpmh-rsc: manage PM notifiers with devres firmware: qcom: scm: Allow QSEECOM on Honor Magicbook Art 14 firmware: qcom: scm: instrument SMC call path with tracepoints firmware: qcom: scm: add trace events for the SMC call interface soc: qcom: Avoid SCM and SPM for cpuidle drivers soc: qcom: Make important drivers default soc: qcom: Restrict drivers per ARM/ARM64 soc: qcom: Hide all drivers behind selectable menu MAINTAINERS: Add maintainer entry for Qualcomm PAS TZ service firmware: qcom: Add a PAS TEE service firmware: qcom_scm: Migrate to generic PAS service ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-30remoteproc: qcom: pas: Map/unmap subsystem region before auth_and_resetMukesh Ojha
Qualcomm remoteproc drivers such as qcom_q6v5_mss, which do not use the Peripheral Authentication Service (PAS), always map the MBA region before use and unmap it once the usage is complete. This behavior was introduced to avoid issues seen in the past where speculative accesses from the application processor to the MBA region after it was assigned to the remote Q6 led to an XPU violation. The issue was mitigated by unmapping the region before handing control to the remote Q6. Currently, most Qualcomm SoCs using the PAS driver run either with a standalone QHEE or the Gunyah hypervisor. In these environments, the hypervisor unmaps the Q6 memory from HLOS Stage-2 and remaps it into the Q6 Stage-2 page table. As a result, speculative accesses from HLOS cannot reach the region even if it remains mapped in HLOS Stage-1; therefore, XPU violations cannot occur. However, when the same SoC runs Linux at EL2, Linux itself must perform the unmapping to avoid such issues. It is still correct to apply this mapping/ unmapping sequence even for SoCs that run under Gunyah, so this behavior should not be conditional. Introduce qcom_pas_ctx_map() in qcom_pas.h to centralise the ioremap_wc pattern used by both qcom_q6v5_pas and qcom_mdt_pas_load, and use it in both places. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260724182858.1868271-5-mukesh.ojha@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30soc: qcom: qcom_stats: Replace CLIENT_VOTES_OFFSET macro with sizeof()Maulik Shah
CLIENT_VOTES_OFFSET (0x20) equals sizeof(struct sleep_stats), since appended_stats immediately follows sleep_stats in the memory layout. Replace the magic constant with sizeof(struct sleep_stats) to make the layout relationship self-documenting and drop the macro. No functional impact. Assisted-by: Claude:claude-sonnet-4-6 Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260730-b4b4-removed-unused-macros-v1-2-2883fecb9e6e@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30soc: qcom: qcom_stats: Remove unused macro definitionsMaulik Shah
Remove macros that are defined but never used, as identified by -Wunused-macros: STAT_TYPE_OFFSET, COUNT_OFFSET, LAST_ENTERED_AT_OFFSET, LAST_EXITED_AT_OFFSET, ACCUMULATED_OFFSET No functional impact. Assisted-by: Claude:claude-sonnet-4-6 Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260730-b4b4-removed-unused-macros-v1-1-2883fecb9e6e@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30soc: qcom: ubwc: Get HBB from SMEMKonrad Dybcio
To make sure the correct settings for a given DRAM configuration get applied, attempt to retrieve that data from SMEM (which happens to be what the BSP kernel does, albeit with through convoluted means of the bootloader altering the DT with this data). Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260727-topic-smem_dramc-v5-3-66188b3e338d@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30soc: qcom: smem: Expose DDR data from SMEMKonrad Dybcio
Most modern Qualcomm platforms (>= SM8150) expose information about the DDR memory present on the system via SMEM. Details from this information is used in various scenarios, such as multimedia drivers configuring the hardware based on the "Highest Bank address Bit" (hbb), or the list of valid frequencies in validation scenarios... Add support for parsing v3-v7 version of the structs. Unforunately, they are not versioned, so some elbow grease is necessary to determine which one is present. See for reference: ver 3: https://git.codelinaro.org/clo/la/abl/tianocore/edk2/-/commit/1d11897d2cfcc7b85f28ff74c445018dbbecac7a ver 4: https://git.codelinaro.org/clo/la/abl/tianocore/edk2/-/commit/f6e9aa549260bbc0bdcb156c2b05f48dc5963203 ver 5: https://git.codelinaro.org/clo/la/abl/tianocore/edk2/-/commit/617d3297abe8b1b8dd3de3d1dd69c3961e6f343f ver 5 with 6regions: https://git.codelinaro.org/clo/la/abl/tianocore/edk2/-/commit/d770e009f9bae58d56d926f7490bbfb45af8341f ver 6: https://git.codelinaro.org/clo/la/abl/tianocore/edk2/-/commit/62659b557fdb1551b20fae8073d1d701dfa8a62e ver 7: https://git.codelinaro.org/clo/la/abl/tianocore/edk2/-/commit/734d95599c5ebb1ca0d4e1639142e65c590532b7 Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://git.codelinaro.org/clo/la/abl/tianocore/edk2/-/commit/1d11897d2cfcc7b85f28ff74c445018dbbecac7a Link: https://lore.kernel.org/r/20260727-topic-smem_dramc-v5-2-66188b3e338d@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30soc: qcom: smem: Use 'unsigned int' instead of 'unsigned'Konrad Dybcio
checkpatch.pl reports: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' Convert the SMEM driver to use the less ambiguous type instead. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260727-topic-smem_dramc-v5-1-66188b3e338d@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30soc: qcom: geni-se: Use HW PROG_RAM_DEPTH to validate firmware sizeViken Dadhaniya
The hardcoded MAX_GENI_CFG_RAMn_CNT limit is not accurate for all SoCs: some targets have less CFG RAM than the constant implies, while others like QCS615 need more entries than the old limit of 455 allowed, causing valid firmware to be rejected at load time. Rather than hardcoding a constant, read PROG_RAM_DEPTH from SE_HW_PARAM_2 at runtime to get the actual CFG RAM depth of the hardware instance and use that as the upper bound for firmware size validation. Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem") Cc: stable@vger.kernel.org Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260702-qup-se-increase-ram-cnt-v3-1-80b363373a5b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30soc: qcom: pmic_glink_altmode: Define the TBT extradata properlyKonrad Dybcio
Before the fixes-referenced commit, there was a trailing 'u32 reserved' after the payload array. That commit gobbled it up into the thunderbolt extradata. Push it back where it belongs. There's no functional change, since the outer struct size remains identical - struct usbc_sc8280x_tbt_data and therefore the union it's a part of made up for the difference and the res bytes were ignored anyway. Fixes: 0539c5a6fdef ("soc: qcom: pmic_glink_altmode: Consume TBT3/USB4 mode notifications") Reported-by: Fenglin Wu <fenglin.wu@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260717-topic-tbt_extradata_fixup-v1-1-5caa18f1c8d3@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-29soc: qcom: geni-se: trace: Add trace event support for GENI SE registers dumpPraveen Talari
Diagnosing GENI SE-based driver (serial, SPI, I2C) failures currently requires reading each hardware register individually, either through ad hoc debug code or a debugger. This is slow, requires the state to remain stable across the multiple reads, and cannot be run non-intrusively during normal operation without adding printk-style noise to each driver. Add a new trace event header for the Qualcomm GENI Serial Engine (SE) framework providing a geni_se_regs tracepoint. This tracepoint captures a comprehensive snapshot of the GENI SE hardware state in a single trace record, making it possible to correlate register values at a precise point in time without multiple sequential reads. The trace event records the following register groups: - Main/secondary command and IRQ status (M_CMD0, S_CMD0, M/S_IRQ_STATUS) - Engine status, IOS, and command control/error registers - TX/RX FIFO status and watermark registers (including RFR watermark) - M/S GP length registers - DMA TX/RX IRQ, enable, length, pointer, attribute, and burst registers - DMA interface enable, general config, QSB trans config, and debug - M/S IRQ enable, GSI event enable, and top-level SE IRQ enable - Serial master/slave clock config, general config, output control, clock control RO, FIFO interface disable, and FW multilock MSA - Clock select register Having all these registers captured atomically in a single ftrace record allows drivers built on top of the GENI SE framework (serial, SPI, I2C) to invoke this tracepoint on error paths and reconstruct the full engine state during post-mortem analysis without instrumenting each driver separately. Acked-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Link: https://patch.msgid.link/20260729-add-tracepoints-for-se-reg-dump-v4-1-08bbd63b0ed2@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-17soc: qcom: llcc: Skip ECC interrupt setup on Shikra, pre-configured by DSFFaiyaz Mohammed
On Shikra, the DDR System Firmware (DSF) configures ECC interrupt routing before the kernel driver probes — it enables Tag/Data RAM interrupts and programs error thresholds in the LLCC interrupt-enable registers. Set irq_configured in shikra_cfg so that qcom_llcc_edac_probe() skips calling qcom_llcc_core_setup(), which would otherwise overwrite the firmware-managed register state with redundant writes. Signed-off-by: Faiyaz Mohammed <faiyaz.mohammed@oss.qualcomm.com> Reviewed-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Reviewed-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260713-shikra-edac-v2-1-22fcb3ca9fb9@qti.qualcomm.com [bjorn: Changed subject prefix] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-11soc: qcom: rpmh-rsc: manage PM notifiers with devresPengpeng Hou
rpmh_rsc_probe() registers CPU PM or genpd notifiers before populating child devices. If child population fails, the CPU PM notifier path is not unwound and the genpd path needs open-coded cleanup. Use devm_pm_runtime_enable() for the genpd path and devm_add_action_or_reset() for both notifier registrations. This makes probe failure and driver detach use the same cleanup model while keeping devm_of_platform_populate() responsible for child devices. Fixes: 25092e6100ac ("soc: qcom: rpmh-rsc: Attach RSC to cluster PM domain") Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260623015501.31129-1-pengpeng@iscas.ac.cn Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-11soc: qcom: Avoid SCM and SPM for cpuidle driversKrzysztof Kozlowski
QCOM_SCM and QCOM_SPM are user-selectable drivers, thus ARM_QCOM_SPM_CPUIDLE should rather avoid selecting them but instead depend to avoid any possible unmet dependencies. ARM_QCOM_SPM_CPUIDLE does use symbols from SCM and SPM, and since it cannot be built-in, the dependency must be as built-in. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260711-qcom-soc-kconfig-v2-4-4a907e064281@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-11soc: qcom: Make important drivers defaultKrzysztof Kozlowski
The drivers for Qualcomm SoC components are covering a basic or fundamental SoC blocks. Usually they are required for booting or to achieve basic expected functionality when running Linux. These drivers do not represent any sort of buses visible to the board designers/configurators, thus they should be always enabled, regardless how SoC is used in the final board. Kernel configuration should not ask users choice of drivers when that choice is obvious and known to the developers that answer should be 'yes' or 'module'. Switch most of the Qualcomm SoC drivers to a default 'yes' or 'module' for ARCH_QCOM, to match existing defconfig usage. This has no impact on arm64 defconfig, arm qcom_defconfig and arm multi_v7_defconfig. multi: +#define CONFIG_QCOM_PDR_HELPERS_MODULE 1 +#define CONFIG_QCOM_PBS_MODULE 1 +#define CONFIG_QCOM_AOSS_QMP 1 +#define CONFIG_QCOM_APR_MODULE 1 +#define CONFIG_QCOM_LLCC_MODULE 1 qcom: +#define CONFIG_QCOM_PDR_HELPERS_MODULE 1 +#define CONFIG_QCOM_PBS_MODULE 1 +#define CONFIG_QCOM_AOSS_QMP 1 +#define CONFIG_QCOM_APR_MODULE 1 +#define CONFIG_QCOM_SPM 1 +#define CONFIG_QCOM_LLCC_MODULE 1 The change will however enable by default all drivers for arm or arm64 COMPILE_TEST builds, whenever ARCH_QCOM is selected, which feels logical: if one selects ARCH_QCOM then probably by default wants to build test it entirely. Kernels with COMPILE_TEST are not supposed to be used for booting. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260711-qcom-soc-kconfig-v2-3-4a907e064281@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-11soc: qcom: Restrict drivers per ARM/ARM64Krzysztof Kozlowski
There is no point to allow selecting core SoC drivers for Qualcomm ARMv7 SoCs when building ARM64 kernel, and vice versa. This makes kernel configuration more difficult as many do not remember the Qualcomm SoCs model names/numbers and their properties like architecture. No features should be lost because: 1. There won't be a single image for ARMv7 and ARMv8/9 SoCs. 2. Newer ARMv8/9 SoCs won't be running in arm32 emulation mode. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260711-qcom-soc-kconfig-v2-2-4a907e064281@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-11soc: qcom: Hide all drivers behind selectable menuKrzysztof Kozlowski
Switch from a simple menu to menuconfig, so all Qualcomm SoC drivers will be under one selectable option, allowing to disable them all which should make kernel configuration easier when preparing a non-Qualcomm kernel. This has few benefits (functional impact of this commit): 1. Allow compile testing of QCOM_OCMEM, which previously required ARCH_QCOM. 2. Hide behind ARCH_QCOM or COMPILE_TEST drivers specific to Qualcomm which should not be available to other kernel builds: QCOM_PMIC_PDCHARGER_ULOG, QCOM_PMIC_GLINK, QCOM_SPM and QCOM_PBS. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260711-qcom-soc-kconfig-v2-1-4a907e064281@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-09remoteproc: qcom_q6v5_pas: Switch over to generic PAS TZ APIsSumit Garg
Switch qcom_q6v5_pas client driver over to generic PAS TZ APIs. Generic PAS TZ service allows to support multiple TZ implementation backends like QTEE based SCM PAS service, OP-TEE based PAS service and any further future TZ backend service. Since qcom_q6v5_pas depends on MDT loader for PAS firmware loading, it has to be switched over to generic PAS APIs in this commit to avoid any build issues. Reviewed-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Tested-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> # Lemans Tested-by: Vignesh Viswanathan <vignesh.viswanathan@oss.qualcomm.com> # IPQ9650 Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260702115835.167602-5-sumit.garg@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-09soc: qcom: ubwc: Add Shikra UBWC configNabige Aala
Add UBWC configuration for the Shikra platform. Shikra shares the same hardware as QCM2290 (Agatti), so reuse qcm2290_data for the UBWC settings Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Nabige Aala <nabige.aala@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260608-shikra-display-v4-2-88a846afdd5d@oss.qualcomm.com [bjorn: Translated to new generic definitions] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-07soc: qcom: pd-mapper: Add support for QCS8300Mohammad Rafi Shaik
Add support for the Qualcomm QCS8300 SoC to the protection domain mapper. QCS8300 share the same protection domain configuration as SC8280XP, except charger_pd. Add an entry to the kernel, to avoid the need for userspace to provide this service. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260608084139.1468000-3-mohammad.rafi.shaik@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-14 01:31:29 +0000